[PATCH] ARM: dts: allwinner: minimize irq debounce filter per default

[Andreas Feldner <pelzi@flying-snail.de>]

The SoC features debounce logic for external interrupts. Per default,
this is based on a 32kHz oscillator, in effect filtering away multiple
interrupts separated by less than roughly 100µs.

This patch sets different defaults for this filter for this board:
PG is connected to non-mechanical components, without any risk for
showing bounces. PA is mostly exposed to GPIO pins, however the
existence of a debounce filter is undesirable as well if electronic
components are connected.

Additionally, the clock-frequency attribute is added for each of
the 4 cores to eliminate the kernel error message on boot, that
the attribute is missing.

Signed-off-by: Andreas Feldner <pelzi@flying-snail.de>
---
 .../dts/sun8i-h2-plus-bananapi-m2-zero.dts     | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
index d729b7c705db..1fc0d5d1e51a 100644
--- a/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
+++ b/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
@@ -113,6 +113,22 @@ wifi_pwrseq: wifi_pwrseq {
 
 &cpu0 {
 	cpu-supply = <&reg_vdd_cpux>;
+	clock-frequency = <1296000000>;
+};
+
+&cpu1 {
+	cpu-supply = <&reg_vdd_cpux>;
+	clock-frequency = <1296000000>;
+};
+
+&cpu2 {
+	cpu-supply = <&reg_vdd_cpux>;
+	clock-frequency = <1296000000>;
+};
+
+&cpu3 {
+	cpu-supply = <&reg_vdd_cpux>;
+	clock-frequency = <1296000000>;
 };
 
 &de {
@@ -193,6 +209,8 @@ bluetooth {
 };
 
 &pio {
+	/* 1µs debounce filter on both IRQ banks */
+	input-debounce = <1 1>;
 	gpio-line-names =
 		/* PA */
 		"CON2-P13", "CON2-P11", "CON2-P22", "CON2-P15",
-- 
2.30.2