On Wed, Feb 08, 2023 at 09:28:41AM -0500, Trevor Woerner wrote: > Update the information in the "Allwinner sunXi SoC support" block: > - include more RISC-V information > - move the block to keep it in alphabetical order > - "L" before "T" (as reported by checkpatch.pl) > > Signed-off-by: Trevor Woerner > -ARM/Allwinner sunXi SoC support > -L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) > -L: linux-sunxi@lists.linux.dev > +ARM/RISC-V/Allwinner sunXi SoC support > +L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) > +L: linux-riscv@lists.infradead.org > +L: linux-sunxi@lists.linux.dev IIRC having the arm list is needed here because the arch/arm{,64} entries specifically exclude the dts subdir. RISC-V doesn't do that though, so adding the list here is mostly redundant. Not that it matters for this patch, but might be worth doing for the RISC-V entry at some point. Also Trevor, I was about to send the above but noticed that your CC list is a bit odd, changing the maintainers entry without CCing any of the maintainers listed in it! I assume you ran get_maintainer.pl & there was a regex match for riscv in it, so only got Palmer & co. I've added the sunxi folk to CC & depending on workflow they may ask you to resend this. FWIW if you lot use b4, the msg-id is: 20230208142841.19597-1-twoerner@gmail.com Cheers, Conor.