From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E9284C433FE for ; Wed, 16 Nov 2022 10:53:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232277AbiKPKxR (ORCPT ); Wed, 16 Nov 2022 05:53:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36876 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238872AbiKPKwy (ORCPT ); Wed, 16 Nov 2022 05:52:54 -0500 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8670B2DAB6; Wed, 16 Nov 2022 02:42:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668595321; x=1700131321; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=bROr3LdaZlpFN3+tkO+XZT8YnRqbjM/A14hFirvkKDk=; b=bP07pyWKEXqjfEPjgsKKxjcnynT6+Qya0Rt9BAKTXtknW4ajTm70VQne GcrMJRgja2r5vRaSiHk1KmM9PQ5YGfRdLPrECLIWiS8eC7JwwSYBtgKLn ElD5mon4td/IOgtZBOP79mlPmbF9YjeqZcqAJ/d24bEyNImbxRkqk+lE7 hzyolE3vV/NDnfnY5XKIZhIBv6uGpJ3RE7VUsaT0g8JXhDgn6SYfIGmDe Akw3KGX6Wf7KROz7DPO5Obg1e5mTSkGtc3fLoo56LIQ+nMhEdf3xofowC 7Q4+O4kSbSwHTaNHOsOAPQkcXT//7G8JdXaFN3K2CcZs+QW2b6vtHlX9c w==; X-IronPort-AV: E=McAfee;i="6500,9779,10532"; a="398800268" X-IronPort-AV: E=Sophos;i="5.96,167,1665471600"; d="scan'208";a="398800268" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Nov 2022 02:42:01 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10532"; a="617123904" X-IronPort-AV: E=Sophos;i="5.96,167,1665471600"; d="scan'208";a="617123904" Received: from smile.fi.intel.com ([10.237.72.54]) by orsmga006.jf.intel.com with ESMTP; 16 Nov 2022 02:41:57 -0800 Received: from andy by smile.fi.intel.com with local (Exim 4.96) (envelope-from ) id 1ovFre-00D5iI-1h; Wed, 16 Nov 2022 12:41:54 +0200 Date: Wed, 16 Nov 2022 12:41:54 +0200 From: Andy Shevchenko To: Rahul Tanwar Cc: devicetree@vger.kernel.org, robh@kernel.org, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, linux-kernel@vger.kernel.org, hpa@zytor.com, alan@lxorguk.ukuu.org.uk, dirk.brandewie@gmail.com, grant.likely@secretlab.ca, sodaville@linutronix.de, devicetree-discuss@lists.ozlabs.org, linux-lgm-soc@maxlinear.com Subject: Re: [PATCH v2 2/2] x86/of: Convert & update Intel's APIC related binding schemas Message-ID: References: <5ba7963fbd82a859ffd99c6d8edb4d717fce0e6c.1668589253.git.rtanwar@maxlinear.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <5ba7963fbd82a859ffd99c6d8edb4d717fce0e6c.1668589253.git.rtanwar@maxlinear.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Nov 16, 2022 at 06:28:21PM +0800, Rahul Tanwar wrote: > Intel's APIC family of interrupt controllers support local APIC > (lapic) & I/O APIC (ioapic). Convert existing bindings for lapic > & ioapic from text to YAML schema. Separate lapic & ioapic schemas. > > Also, update more info and newly introduced optional property for > lapic to choose legacy PIC or virtual wire compatibility interrupt > delivery mode. Conversion should be split from a new property addition. -- With Best Regards, Andy Shevchenko