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From: Andrew Lunn <andrew@lunn.ch>
To: Biao Huang <biao.huang@mediatek.com>
Cc: AngeloGioacchino Del Regno 
	<angelogioacchino.delregno@collabora.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org,
	macpaul.lin@mediatek.com
Subject: Re: [RESEND PATCH v4] arm64: dts: mt8195: Add Ethernet controller
Date: Wed, 21 Dec 2022 14:16:50 +0100	[thread overview]
Message-ID: <Y6MHQnUcfBjibA8C@lunn.ch> (raw)
In-Reply-To: <20221221022523.8458-2-biao.huang@mediatek.com>

> +&eth {
> +	phy-mode ="rgmii-rxid";

That is pretty unusual. You don't see rxid, or txid very often, it is
normally rgmii, or rgmii-id.

> +	phy-handle = <&ethernet_phy0>;
> +	snps,reset-gpio = <&pio 93 GPIO_ACTIVE_HIGH>;
> +	snps,reset-delays-us = <0 10000 10000>;
> +	mediatek,tx-delay-ps = <2030>;

How important is the 30 here?

You appear to have the PHY doing the RX delay, and the MAC doing the
TX delay. Normally we have the PHY do both. Can you actually do

phy-mode = "rgmii-id", and mediatek,tx-delay-ps = <30> ? That would
then have the PHY doing the basic 2ns delay, and the MAC doing the
fine tuning needed for TX?

     Andrew

  parent reply	other threads:[~2022-12-21 13:17 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-21  2:25 [RESEND v4 PATCH 0/1] " Biao Huang
2022-12-21  2:25 ` [RESEND PATCH v4] " Biao Huang
2022-12-21 10:13   ` AngeloGioacchino Del Regno
2022-12-22  1:43     ` Biao Huang (黄彪)
2022-12-21 13:16   ` Andrew Lunn [this message]
2022-12-22  1:56     ` Biao Huang (黄彪)

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