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[66.90.148.213]) by smtp.gmail.com with ESMTPSA id v186sm1148174oig.52.2021.09.03.09.53.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 03 Sep 2021 09:53:44 -0700 (PDT) Received: (nullmailer pid 3085928 invoked by uid 1000); Fri, 03 Sep 2021 16:53:43 -0000 Date: Fri, 3 Sep 2021 11:53:43 -0500 From: Rob Herring To: Daniel Baluta Cc: broonie@kernel.org, pierre-louis.bossart@linux.intel.com, lgirdwood@gmail.com, ranjani.sridharan@linux.intel.com, kai.vehmanen@linux.intel.com, devicetree@vger.kernel.org, shawnguo@kernel.org, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, peter.ujfalusi@linux.intel.com, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, s-anna@ti.com, Daniel Baluta Subject: Re: [PATCH v2 2/2] dt-bindings: dsp: fsl: Add DSP optional clocks documentation Message-ID: References: <20210903145340.225511-1-daniel.baluta@oss.nxp.com> <20210903145340.225511-3-daniel.baluta@oss.nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210903145340.225511-3-daniel.baluta@oss.nxp.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Sep 03, 2021 at 05:53:40PM +0300, Daniel Baluta wrote: > From: Daniel Baluta > > DSP node on the Linux kernel side must also take care of enabling > DAI/DMA related clocks. > > By design we choose to manage DAI/DMA clocks from the kernel side because of > the architecture of some i.MX8 boards. > > Clocks are handled by a special M4 core which runs a special firmware > called SCFW (System Controler firmware). > > This communicates with A cores running Linux via a special Messaging > Unit and implements a custom API which is already implemented by the > Linux kernel i.MX clocks implementation. > > Note that these clocks are optional. We can use the DSP without them. > > Signed-off-by: Daniel Baluta > --- > .../devicetree/bindings/dsp/fsl,dsp.yaml | 33 +++++++++++++++++++ > 1 file changed, 33 insertions(+) > > diff --git a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml > index 7afc9f2be13a..1453668c0194 100644 > --- a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml > +++ b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml > @@ -24,16 +24,49 @@ properties: > maxItems: 1 > > clocks: > + minItems: 3 > items: > - description: ipg clock > - description: ocram clock > - description: core clock > + - description: esai0 core clock for accessing registers > + - description: esai0 baud clock > + - description: esai0 system clock > + - description: esai0 spba clock required when ESAI is placed in slave mode > + - description: SAI1 bus clock > + - description: SAI1 master clock 0 > + - description: SAI1 master clock 1 > + - description: SAI1 master clock 2 > + - description: SAI1 master clock 3 > + - description: SAI3 bus clock > + - description: SAI3 master clock 0 > + - description: SAI3 master clock 1 > + - description: SAI3 master clock 2 > + - description: SAI3 master clock 3 > + - description: SDMA3 root clock used for accessing registers Sigh, I just rejected this kind of thing for the other i.MX8 DSP binding[1]. Add a reference to the h/w block and then get the clocks (and other resources) from there. Rob [1] https://lore.kernel.org/linux-devicetree/YTDq%2FkWFPLHUnHMN@robh.at.kernel.org/