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[66.111.4.228]) by smtp.gmail.com with ESMTPSA id f3sm2315494iow.3.2021.09.10.03.05.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Sep 2021 03:05:58 -0700 (PDT) Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailauth.nyi.internal (Postfix) with ESMTP id D2DCB27C0054; Fri, 10 Sep 2021 06:05:57 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute1.internal (MEProxy); Fri, 10 Sep 2021 06:05:57 -0400 X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvtddrudeguddgvdefucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhepfffhvffukfhfgggtuggjsehttdertddttddvnecuhfhrohhmpeeuohhquhhn ucfhvghnghcuoegsohhquhhnrdhfvghnghesghhmrghilhdrtghomheqnecuggftrfgrth htvghrnhepvdelieegudfggeevjefhjeevueevieetjeeikedvgfejfeduheefhffggedv geejnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomhepsg hoqhhunhdomhgvshhmthhprghuthhhphgvrhhsohhnrghlihhthidqieelvdeghedtieeg qddujeejkeehheehvddqsghoqhhunhdrfhgvnhhgpeepghhmrghilhdrtghomhesfhhigi hmvgdrnhgrmhgv X-ME-Proxy: Received: by mail.messagingengine.com (Postfix) with ESMTPA; Fri, 10 Sep 2021 06:05:54 -0400 (EDT) Date: Fri, 10 Sep 2021 18:04:20 +0800 From: Boqun Feng To: Peter Zijlstra Cc: Dan Lustig , Will Deacon , Linus Torvalds , Alan Stern , Alexander Shishkin , Peter Anvin , Andrea Parri , Ingo Molnar , "Paul E. McKenney" , Vince Weaver , Thomas Gleixner , Jiri Olsa , Arnaldo Carvalho de Melo , Linux Kernel Mailing List , Stephane Eranian , linux-tip-commits@vger.kernel.org, palmer@dabbelt.com, paul.walmsley@sifive.com, mpe@ellerman.id.au Subject: Re: [tip:locking/core] tools/memory-model: Add extra ordering for locks and remove it for ordinary release/acquire Message-ID: References: <20210908144217.GA603644@rowland.harvard.edu> <20210909133535.GA9722@willie-the-truck> <5412ab37-2979-5717-4951-6a61366df0f2@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Sep 10, 2021 at 11:33:25AM +0200, Peter Zijlstra wrote: > On Fri, Sep 10, 2021 at 08:01:14AM +0800, Boqun Feng wrote: > > On Thu, Sep 09, 2021 at 01:03:18PM -0400, Dan Lustig wrote: > > > On 9/9/2021 9:35 AM, Will Deacon wrote: > > > > On Thu, Sep 09, 2021 at 09:25:30AM +0200, Peter Zijlstra wrote: > > > > >> The AMOSWAP is a RmW and as such matches the W from the RW->W fence, > > > >> similarly it marches the R from the R->RW fence, yielding an: > > > >> > > > >> RW-> W > > > >> RmW > > > >> R ->RW > > > >> > > > >> ordering. It's the stores S and R that can be re-ordered, but not the > > > >> sections themselves (same on PowerPC and many others). > > > > I agree with Will here. If the AMOSWAP above is actually implemented with > > > a RISC-V AMO, then the two critical sections will be separated as if RW,RW, > > > as Peter described. If instead it's implemented using LR/SC, then RISC-V > > > > Just out of curiosity, in the following code, can the store S and load L > > be reordered? > > > > WRITE_ONCE(x, 1); // store S > > FENCE RW, W > > WRITE_ONCE(s.lock, 0); // unlock(s) > > AMOSWAP %0, 1, s.lock // lock(s) > > FENCE R, RW > > r1 = READ_ONCE(y); // load L > > > > I think they can, because neither "FENCE RW, W" nor "FENCE R, RW" order > > them. > > I'm confused by your argument, per the above quoted section, those > fences and the AMO combine into a RW,RW ordering which is (as per the > later clarification) multi-copy-atomic, aka smp_mb(). > Right, my question is more about the reasoning about why fence rw,w + AMO + fence r,rw act as a fence rw,rw. Another related question, can fence rw,w + store + fence w,rw act as a fence rw,rw by the similar reasoning? IOW, will the two loads in the following be reordered? r1 = READ_ONCE(x); FENCE RW, W WRITE_ONCE(z, 1); FENCE W, RW r2 = READ_ONCE(y); again, this is more like a question out of curiosity, not that I find this pattern is useful. Regards, Boqun > As such, S and L are not allowed to be re-ordered in the given scenario. > > > Note that the reordering is allowed in LKMM, because unlock-lock > > only need to be as strong as RCtso. > > Risc-V is strictly stronger than required in this instance. Given the > current lock implementation. Daniel pointed out that if the atomic op > were LL/SC based instead of AMO it would end up being RCtso. >