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From: Peter Zijlstra <peterz@infradead.org>
To: Eric Dumazet <eric.dumazet@gmail.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	linux-kernel <linux-kernel@vger.kernel.org>,
	Eric Dumazet <edumazet@google.com>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	Borislav Petkov <bp@suse.de>
Subject: Re: [PATCH v2] x86/apic: reduce cache line misses in __x2apic_send_IPI_mask()
Date: Tue, 12 Oct 2021 14:47:44 +0200	[thread overview]
Message-ID: <YWWD8NCCJi3kZKvq@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <20211007143556.574911-1-eric.dumazet@gmail.com>

On Thu, Oct 07, 2021 at 07:35:56AM -0700, Eric Dumazet wrote:
> From: Eric Dumazet <edumazet@google.com>
> 
> Using per-cpu storage for @x86_cpu_to_logical_apicid
> is not optimal.
> 
> Broadcast IPI will need at least one cache line
> per cpu to access this field.
> 
> __x2apic_send_IPI_mask() is using standard bitmask operators.
> 
> By converting x86_cpu_to_logical_apicid to an array,
> we divide by 16x number of needed cache lines, because
> we find 16 values per cache line. CPU prefetcher can
> kick nicely.
> 
> Also move @cluster_masks to READ_MOSTLY section to avoid false sharing.
> 
> Tested on a dual socket host with 256 cpus,
> cost for a full broadcast is now 11 usec instead of 33 usec.
> 
> v2: use a dynamically allocated array, as suggested by Peter.
> 
> Signed-off-by: Eric Dumazet <edumazet@google.com>

Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>

  reply	other threads:[~2021-10-12 12:47 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-07 14:35 Eric Dumazet
2021-10-12 12:47 ` Peter Zijlstra [this message]
2021-10-29  0:14   ` Eric Dumazet
2021-10-29  8:09 ` [tip: x86/apic] x86/apic: Reduce " tip-bot2 for Eric Dumazet

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