Re: [PATCH v2 03/13] perf/x86/amd: add AMD Fam19h Branch Sampling support

[Peter Zijlstra <peterz@infradead.org>]

On Thu, Nov 18, 2021 at 01:20:09PM +0100, Peter Zijlstra wrote:
> On Tue, Nov 16, 2021 at 11:23:39PM -0800, Stephane Eranian wrote:

> > Ok, I made the changes you suggested. It looks closer to the way LBR is handled.
> > However, this means that there is no path by which you can get to
> > amd_pmu_disable_event()
> > without having gone through amd_pmu_disable_all(). Is that always the
> > case? And same thing
> > on the enable side.
> 
> So that's true for ->add() and ->del(), those cannot be called without
> being wrapped in ->pmu_disable(), ->pmu_enable().
> 
> There is however the ->stop() and ->start() usage for throttling, which
> can stop an individual event (while leaving the event scheduled on the
> PMU). Now, I think the ->stop() gets called with the PMU enabled, but
> the ->start() is with it disabled again.

I just looked, and the throttling depends on the PMU's PMI handler
implementation, for Intel it will have the PMU disabled, for generic and
AMD it has it enabled (see x86_pmu_handle_irq -- also these are really
NMIs but lets not do a mass rename just now).

> The ramification would be that we'd stop the event, but leave BRS
> enabled for a throttled event. Which should be harmless, no?