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From: Zev Weiss <zev@bewilderbeest.net>
To: Guenter Roeck <linux@roeck-us.net>
Cc: linux-hwmon@vger.kernel.org, Jean Delvare <jdelvare@suse.com>,
	Denis Pauk <pauk.denis@gmail.com>,
	linux-kernel@vger.kernel.org, Renze Nicolai <renze@rnplus.nl>
Subject: Re: [PATCH v3] hwmon: (nct6775) add support for TSI temperature registers
Date: Thu, 13 Jan 2022 03:16:26 -0800	[thread overview]
Message-ID: <YeAKCos0hioMAiqi@hatter.bewilderbeest.net> (raw)
In-Reply-To: <20220112164729.GA399472@roeck-us.net>

On Wed, Jan 12, 2022 at 08:47:29AM PST, Guenter Roeck wrote:
>On Tue, Jan 11, 2022 at 07:48:24PM -0800, Zev Weiss wrote:
>> These registers report CPU temperatures (and, depending on the system,
>> sometimes chipset temperatures) via the TSI interface on AMD systems.
>> They're distinct from most of the other Super-IO temperature readings
>> (CPUTIN, SYSTIN, etc.) in that they're not a selectable source for
>> monitoring and are in a different (higher resolution) format, but can
>> still provide useful temperature data.
>>
>> Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
>> Tested-by: Renze Nicolai <renze@rnplus.nl>
>> ---
>>
>[ ... ]
>
>> +		switch (data->kind) {
>> +		case nct6791:
>> +		case nct6792:
>> +		case nct6793:
>> +			data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP;
>> +			num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP);
>> +			break;
>> +		case nct6795:
>> +		case nct6796:
>> +		case nct6797:
>> +		case nct6798:
>> +			data->REG_TSI_TEMP = NCT6796_REG_TSI_TEMP;
>> +			num_reg_tsi_temp = ARRAY_SIZE(NCT6796_REG_TSI_TEMP);
>> +			break;
>> +		default:
>> +			dev_warn(dev, "unknown number of TSI temp registers for %s\n", data->name);
>> +			num_reg_tsi_temp = 0;
>> +			break;
>
>Please drop the message. This is new functionality which should not
>suddenly produce a warning for chips which possibly do not support those
>registers in the first place. For users with those chips the warning
>is just confusing.
>

Just to confirm, this switch currently covers all the enum cases handled 
by the surrounding switch case, so as it stands the default case should 
be unreachable and hence it should be guaranteed not to warn for any 
existing chip, only for a hypothetical newly-added one (the intent being 
that someone adding another chip in the future would be less likely to 
accidentally omit TSI support).  Unfortunately gcc doesn't seem to be 
quite smart enough to realize that and avoid warning about missing 
switch cases in the inner switch if I remove the default case entirely, 
so we can't just rely on the compiler to warn about it.

Shall I still remove it anyway?  (I could certainly also add a comment 
clarifying the above.)


Zev


  reply	other threads:[~2022-01-13 11:16 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-12  3:48 Zev Weiss
2022-01-12 16:47 ` Guenter Roeck
2022-01-13 11:16   ` Zev Weiss [this message]
2022-01-13 14:51     ` Guenter Roeck

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