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Date:   Wed, 9 Mar 2022 17:48:27 +0100
From:   Andrew Lunn <andrew@lunn.ch>
To:     =?iso-8859-1?Q?Cl=E9ment_L=E9ger?= <clement.leger@bootlin.com>
Cc:     Heiner Kallweit <hkallweit1@gmail.com>,
        Russell King <linux@armlinux.org.uk>,
        "David S . Miller" <davem@davemloft.net>,
        Jakub Kicinski <kuba@kernel.org>,
        Florian Fainelli <f.fainelli@gmail.com>,
        "Andrew F . Davis" <afd@ti.com>, Dan Murphy <dmurphy@ti.com>,
        netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
        Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
        Miquel Raynal <miquel.raynal@bootlin.com>
Subject: Re: [PATCH] net: phy: DP83822: clear MISR2 register to disable
 interrupts
Message-ID: <YijaWxjDESZRrHXQ@lunn.ch>
References: <20220309142228.761153-1-clement.leger@bootlin.com>
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On Wed, Mar 09, 2022 at 03:22:28PM +0100, Clément Léger wrote:
> MISR1 was cleared twice but the original author intention was probably
> to clear MISR1 & MISR2 to completely disable interrupts. Fix it to
> clear MISR2.
> 
> Fixes: 87461f7a58ab ("net: phy: DP83822 initial driver submission")
> Signed-off-by: Clément Léger <clement.leger@bootlin.com>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew