From: Thadeu Lima de Souza Cascardo <cascardo@canonical.com>
To: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
linux-kernel@vger.kernel.org, stable@vger.kernel.org,
Daniel Sneddon <daniel.sneddon@linux.intel.com>,
antonio.gomez.iglesias@linux.intel.com,
Josh Poimboeuf <jpoimboe@kernel.org>
Subject: Re: [PATCH v2] x86/bugs: Warn when "ibrs" mitigation is selected on Enhanced IBRS parts
Date: Thu, 14 Jul 2022 21:11:18 -0300 [thread overview]
Message-ID: <YtCwpjeRVu4LVOyF@quatroqueijos> (raw)
In-Reply-To: <2a5eaf54583c2bfe0edc4fea64006656256cca17.1657814857.git.pawan.kumar.gupta@linux.intel.com>
On Thu, Jul 14, 2022 at 04:15:35PM -0700, Pawan Gupta wrote:
> IBRS mitigation for spectre_v2 forces write to MSR_IA32_SPEC_CTRL at
> every kernel entry/exit. On Enhanced IBRS parts setting
> MSR_IA32_SPEC_CTRL[IBRS] only once at boot is sufficient. MSR writes at
> every kernel entry/exit incur unnecessary performance loss.
>
> When Enhanced IBRS feature is present, print a warning about this
> unnecessary performance loss.
>
> Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Reviewed-by: Thadeu Lima de Souza Cascardo <cascardo@canonical.com>
> ---
> v1->v2: Instead of changing the mitigation, print a warning about the
> perf loss.
>
> v1: https://lore.kernel.org/lkml/0456b35fb9ef957d9a9138e0913fb1a3fd445dff.1657747493.git.pawan.kumar.gupta@linux.intel.com/
>
> arch/x86/kernel/cpu/bugs.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
> index 0dd04713434b..1c54fad3c54b 100644
> --- a/arch/x86/kernel/cpu/bugs.c
> +++ b/arch/x86/kernel/cpu/bugs.c
> @@ -975,6 +975,7 @@ static inline const char *spectre_v2_module_string(void) { return ""; }
> #define SPECTRE_V2_LFENCE_MSG "WARNING: LFENCE mitigation is not recommended for this CPU, data leaks possible!\n"
> #define SPECTRE_V2_EIBRS_EBPF_MSG "WARNING: Unprivileged eBPF is enabled with eIBRS on, data leaks possible via Spectre v2 BHB attacks!\n"
> #define SPECTRE_V2_EIBRS_LFENCE_EBPF_SMT_MSG "WARNING: Unprivileged eBPF is enabled with eIBRS+LFENCE mitigation and SMT, data leaks possible via Spectre v2 BHB attacks!\n"
> +#define SPECTRE_V2_IBRS_PERF_MSG "WARNING: IBRS mitigation selected on Enhanced IBRS CPU, this may cause unnecessary performance loss\n"
>
> #ifdef CONFIG_BPF_SYSCALL
> void unpriv_ebpf_notify(int new_state)
> @@ -1415,6 +1416,8 @@ static void __init spectre_v2_select_mitigation(void)
>
> case SPECTRE_V2_IBRS:
> setup_force_cpu_cap(X86_FEATURE_KERNEL_IBRS);
> + if (boot_cpu_has(X86_FEATURE_IBRS_ENHANCED))
> + pr_warn(SPECTRE_V2_IBRS_PERF_MSG);
> break;
>
> case SPECTRE_V2_LFENCE:
>
> base-commit: 4a57a8400075bc5287c5c877702c68aeae2a033d
> --
> 2.35.3
>
>
next prev parent reply other threads:[~2022-07-15 0:11 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-14 5:32 [PATCH] x86/bugs: Switch to "auto" when "ibrs" " Pawan Gupta
2022-07-14 11:17 ` Thadeu Lima de Souza Cascardo
2022-07-14 11:42 ` Peter Zijlstra
2022-07-14 14:59 ` Pawan Gupta
2022-07-14 16:01 ` Josh Poimboeuf
2022-07-14 17:03 ` Peter Zijlstra
2022-07-14 17:38 ` Josh Poimboeuf
2022-07-14 18:11 ` Peter Zijlstra
2022-07-14 18:42 ` Pawan Gupta
2022-07-14 23:15 ` [PATCH v2] x86/bugs: Warn when "ibrs" mitigation is " Pawan Gupta
2022-07-15 0:11 ` Thadeu Lima de Souza Cascardo [this message]
2022-07-15 2:00 ` Pawan Gupta
2022-07-15 5:25 ` Greg KH
2022-07-15 17:21 ` Pawan Gupta
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