From: Peter Zijlstra <peterz@infradead.org>
To: guoren@kernel.org
Cc: arnd@arndb.de, palmer@rivosinc.com, tglx@linutronix.de,
luto@kernel.org, conor.dooley@microchip.com, heiko@sntech.de,
jszhang@kernel.org, lazyparser@gmail.com, falcon@tinylab.org,
chenhuacai@kernel.org, apatel@ventanamicro.com,
atishp@atishpatra.org, palmer@dabbelt.com,
paul.walmsley@sifive.com, mark.rutland@arm.com,
zouyipeng@huawei.com, bigeasy@linutronix.de,
David.Laight@aculab.com, linux-arch@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
Guo Ren <guoren@linux.alibaba.com>
Subject: Re: [PATCH V5 07/11] riscv: convert to generic entry
Date: Mon, 19 Sep 2022 15:34:25 +0200 [thread overview]
Message-ID: <Yyhv4UUXuSfvMOw+@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <20220918155246.1203293-8-guoren@kernel.org>
On Sun, Sep 18, 2022 at 11:52:42AM -0400, guoren@kernel.org wrote:
> @@ -123,18 +126,22 @@ int handle_misaligned_store(struct pt_regs *regs);
>
> asmlinkage void __trap_section do_trap_load_misaligned(struct pt_regs *regs)
> {
> + irqentry_state_t state = irqentry_enter(regs);
> if (!handle_misaligned_load(regs))
> return;
> do_trap_error(regs, SIGBUS, BUS_ADRALN, regs->epc,
> "Oops - load address misaligned");
> + irqentry_exit(regs, state);
> }
>
> asmlinkage void __trap_section do_trap_store_misaligned(struct pt_regs *regs)
> {
> + irqentry_state_t state = irqentry_enter(regs);
> if (!handle_misaligned_store(regs))
> return;
> do_trap_error(regs, SIGBUS, BUS_ADRALN, regs->epc,
> "Oops - store (or AMO) address misaligned");
> + irqentry_exit(regs, state);
> }
> #endif
> DO_ERROR_INFO(do_trap_store_fault,
> @@ -158,6 +165,8 @@ static inline unsigned long get_break_insn_length(unsigned long pc)
>
> asmlinkage __visible __trap_section void do_trap_break(struct pt_regs *regs)
> {
> + irqentry_state_t state = irqentry_enter(regs);
> +
> #ifdef CONFIG_KPROBES
> if (kprobe_single_step_handler(regs))
> return;
FWIW; on x86 I've classified many of the 'from-kernel' traps as
NMI-like, since those traps can happen from any context, including with
IRQs disabled.
The basic shape of the trap handlers looks a little like:
if (user_mode(regs)) {
irqenrty_enter_from_user_mode(regs);
do_user_trap();
irqentry_exit_to_user_mode(regs);
} else {
irqentry_state_t state = irqentry_nmi_enter(regs);
do_kernel_trap();
irqentry_nmi_exit(regs, state);
}
Not saying you have to match Risc-V in this patch-set, just something to
consider.
next prev parent reply other threads:[~2022-09-19 13:35 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-18 15:52 [PATCH V5 00/11] riscv: Add GENERIC_ENTRY support and related features guoren
2022-09-18 15:52 ` [PATCH V5 01/11] riscv: elf_kexec: Fixup compile warning guoren
2022-09-18 15:52 ` [PATCH V5 02/11] riscv: compat_syscall_table: " guoren
2022-09-18 15:52 ` [PATCH V5 03/11] riscv: ptrace: Remove duplicate operation guoren
2022-09-18 15:52 ` [PATCH V5 04/11] compiler_types.h: Add __noinstr_section() for noinstr guoren
2022-09-18 15:52 ` [PATCH V5 05/11] riscv: traps: Add noinstr to prevent instrumentation inserted guoren
2022-09-18 15:52 ` [PATCH V5 06/11] entry: Prevent DEBUG_PREEMPT warning guoren
2022-09-19 11:58 ` Peter Zijlstra
2022-09-20 1:45 ` Guo Ren
2022-09-30 12:27 ` Guo Ren
2022-09-18 15:52 ` [PATCH V5 07/11] riscv: convert to generic entry guoren
2022-09-19 13:34 ` Peter Zijlstra [this message]
2022-09-20 6:36 ` Guo Ren
2022-09-20 7:22 ` Peter Zijlstra
2022-09-30 11:28 ` Guo Ren
2022-09-18 15:52 ` [PATCH V5 08/11] riscv: Support HAVE_IRQ_EXIT_ON_IRQ_STACK guoren
2022-09-19 13:45 ` Peter Zijlstra
2022-09-20 6:08 ` Guo Ren
2022-09-20 7:27 ` Peter Zijlstra
2022-09-20 7:34 ` Peter Zijlstra
2022-09-21 6:16 ` Guo Ren
2022-09-21 8:34 ` Chen Zhongjin
2022-09-21 9:53 ` Guo Ren
2022-09-21 11:56 ` Chen Zhongjin
2022-09-22 1:26 ` Guo Ren
2022-09-18 15:52 ` [PATCH V5 09/11] riscv: Support HAVE_SOFTIRQ_ON_OWN_STACK guoren
2022-09-20 0:11 ` Guo Ren
2022-09-18 15:52 ` [PATCH V5 10/11] riscv: Add config of thread stack size guoren
2022-09-18 15:52 ` [PATCH V5 11/11] riscv: Add support for STACKLEAK gcc plugin guoren
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