From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Cc: "Geert Uytterhoeven" <geert@linux-m68k.org>,
"Sakari Ailus" <sakari.ailus@linux.intel.com>,
"Lad Prabhakar" <prabhakar.mahadev-lad.rj@bp.renesas.com>,
"Mauro Carvalho Chehab" <mchehab@kernel.org>,
"Rob Herring" <robh+dt@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Jacopo Mondi" <jacopo@jmondi.org>,
"Niklas Söderlund" <niklas.soderlund@ragnatech.se>,
"Hans Verkuil" <hverkuil-cisco@xs4all.nl>,
linux-media@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
"Biju Das" <biju.das.jz@bp.renesas.com>
Subject: Re: [PATCH v2 3/4] media: platform: Add Renesas RZ/G2L MIPI CSI-2 receiver driver
Date: Thu, 22 Sep 2022 16:51:29 +0300 [thread overview]
Message-ID: <YyxoYSnj9llox5l1@pendragon.ideasonboard.com> (raw)
In-Reply-To: <CA+V-a8sW=a6auFH-1WqwK+o2MZGCQk+MAO4+cWKm1M+YrQE+CA@mail.gmail.com>
On Thu, Sep 22, 2022 at 02:27:15PM +0100, Lad, Prabhakar wrote:
> On Thu, Sep 22, 2022 at 1:51 PM Geert Uytterhoeven wrote:
> > On Thu, Sep 22, 2022 at 2:34 PM Sakari Ailus wrote:
> > > On Thu, Sep 22, 2022 at 01:08:33PM +0100, Lad, Prabhakar wrote:
> > > > > > * Switched to manually turn ON/OFF the clocks instead of pm_runtime so that
> > > > > > the mipi/dhpy initialization happens as per the HW manual
> > > > >
> > > > > That doesn't look right. The driver doesn't use runtime PM anymore, so
> > > > > power domains may not be handled properly. What was the problem with
> > > > > clock handling using runtime PM ?
> > > > >
> > > > If we use the runtime PM all the clocks will be turned ON when we call
> > > > pm_runtime_resume_and_get() which I dont want to. As per the "Starting
> > > > reception for MIPI CSI-2 Input" section 35.3.1 for example we first
> > > > need to turn ON all the clocks and later further down the line we need
> > > > to just turn OFF VCLK -> Enable Link -> turn ON VCLK. Due to such
> > > > cases I have switched to individual clock handling.
> > >
> > > If that is the case, then you should control just that clock directly,
> > > outside runtime PM callbacks.
> > >
> > > Runtime PM may be needed e.g. for resuming a parent device.
> >
> > Exactly.
> > So probably you should not consider R9A07G044_CRU_VCLK a PM clock,
> > i.e. you need changes to rzg2l_cpg_is_pm_clk() to exclude it.
>
> Thanks for the pointer. In that case we will have to consider
> R9A07G044_CRU_VCLK and R9A07G044_CRU_SYSCLK as not PM clocks.
I like when patch review discussions continue on the list without my
involvement, and the end result is exactly what I would have advised :-)
> Does the below sound good?
> - DEF_NO_PM() macro
> - bool is_pm_clk in struct rzg2l_mod_clk.
>
> I still have to implement it, just wanted your opinion beforehand.
Looks good to me, but I'm no expert in this area. I trust Geert's
advice.
--
Regards,
Laurent Pinchart
next prev parent reply other threads:[~2022-09-22 13:52 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-05 23:04 [PATCH v2 0/4] Add driver for CSI2 and CRU modules found on Renesas RZ/G2L SoC Lad Prabhakar
2022-09-05 23:04 ` [PATCH v2 1/4] media: dt-bindings: Document Renesas RZ/G2L CSI-2 block Lad Prabhakar
2022-09-08 11:38 ` Krzysztof Kozlowski
2022-09-08 11:39 ` Krzysztof Kozlowski
2022-09-21 12:31 ` Lad, Prabhakar
2022-09-21 15:49 ` Krzysztof Kozlowski
2022-09-05 23:04 ` [PATCH v2 2/4] media: dt-bindings: Document Renesas RZ/G2L CRU block Lad Prabhakar
2022-09-08 11:40 ` Krzysztof Kozlowski
2022-09-21 12:43 ` Laurent Pinchart
2022-09-21 15:51 ` Krzysztof Kozlowski
2022-09-21 17:29 ` Laurent Pinchart
2022-09-21 18:58 ` Krzysztof Kozlowski
2022-09-22 13:46 ` Laurent Pinchart
2022-09-30 10:49 ` Lad, Prabhakar
2022-09-30 12:07 ` Krzysztof Kozlowski
2022-09-30 21:05 ` Laurent Pinchart
2022-09-05 23:04 ` [PATCH v2 3/4] media: platform: Add Renesas RZ/G2L MIPI CSI-2 receiver driver Lad Prabhakar
2022-09-21 16:12 ` Laurent Pinchart
2022-09-22 12:08 ` Lad, Prabhakar
2022-09-22 12:34 ` Sakari Ailus
2022-09-22 12:51 ` Geert Uytterhoeven
2022-09-22 13:27 ` Lad, Prabhakar
2022-09-22 13:51 ` Laurent Pinchart [this message]
2022-09-22 19:13 ` Geert Uytterhoeven
2022-09-22 13:12 ` Lad, Prabhakar
2022-09-21 21:35 ` Sakari Ailus
2022-09-22 12:53 ` Lad, Prabhakar
2022-09-22 13:02 ` Sakari Ailus
2022-09-22 13:16 ` Lad, Prabhakar
2022-09-05 23:04 ` [PATCH v2 4/4] media: platform: Add Renesas RZ/G2L CRU driver Lad Prabhakar
2022-09-22 15:28 ` Laurent Pinchart
2022-09-23 19:02 ` Lad, Prabhakar
2022-09-26 8:59 ` Laurent Pinchart
2022-09-26 16:24 ` Lad, Prabhakar
2022-09-26 16:29 ` Laurent Pinchart
2022-09-26 17:27 ` Lad, Prabhakar
2022-09-26 18:11 ` Laurent Pinchart
2022-09-27 19:23 ` Lad, Prabhakar
2022-09-23 20:14 ` Sakari Ailus
2022-09-24 11:38 ` Lad, Prabhakar
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