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AJvYcCW0toywdfbhn4yd9VHizEc28V4uPqbgVWS94mRGl5p6SUii7MxEMIZtdPQTdJqgtStpCnNbf2jIM9aAXfc=@vger.kernel.org X-Gm-Message-State: AOJu0YyHtHuLaY3YmbFXNLV5Wemx03pEyMVt4dAVikmi91QCc+u1hMSz SfdvjXkbRI8RhkIpBnucqoJHsF3kYuudXNB6ZrXV/CWY+fZb/ydVgkhPHO6XcQiVu9WpWCuDdOn nvw== X-Google-Smtp-Source: AGHT+IEI2FjqSQlgyOXVWtopCKGmKbmg8oOBwTnVpB+jnl2r6bZ2xGzFksatMXVNA+xjFscEpYN0ZcT+Ikw= X-Received: from pjbsj10.prod.google.com ([2002:a17:90b:2d8a:b0:2ff:84e6:b2bd]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:90b:1347:b0:2fe:dd2c:f8e7 with SMTP id 98e67ed59e1d1-30531fa4d65mr23357949a91.10.1743553359450; Tue, 01 Apr 2025 17:22:39 -0700 (PDT) Date: Tue, 1 Apr 2025 17:22:38 -0700 In-Reply-To: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20250401221107.921677-1-seanjc@google.com> Message-ID: Subject: Re: [PATCH] KVM: VMX: Add a quirk to (not) honor guest PAT on CPUs that support self-snoop From: Sean Christopherson To: Yan Zhao Cc: Paolo Bonzini , kvm@vger.kernel.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="us-ascii" On Wed, Apr 02, 2025, Yan Zhao wrote: > On Tue, Apr 01, 2025 at 03:11:07PM -0700, Sean Christopherson wrote: > > Add back support for honoring guest PAT on Intel CPUs that support self- > > snoop (and don't have errata), but guarded by a quirk so as not to break > > existing setups that subtly relied on KVM forcing WB for synthetic > > devices. > > > > This effectively reverts commit 9d70f3fec14421e793ffbc0ec2f739b24e534900 > > and reapplies 377b2f359d1f71c75f8cc352b5c81f2210312d83, but with a quirk. > > > > Cc: Yan Zhao > > Signed-off-by: Sean Christopherson > > --- > > > Hi Sean, > > > AFAIK, we don't have an answer as to whether the slow UC behavior on CLX+ > > is working as intended or a CPU flaw, which Paolo was hoping we would get > We did answer the slow UC behavior is working as intended at [1]. > > "After consulting with CPU architects, > it's told that this behavior is expected on ICX/SPR Xeon platforms due to > the snooping implementation." > > Paolo then help update the series to v2 [2] /v3 [3]. > > Did you overlook those series, or is there something I missed? Nope, you didn't miss anything. I have that series in my TODO folder, but only glanced at it when it flew by and completely missed that it quirks ignoring guest PAT. Not sure how I missed the cover letter subject though... Anyways, ignore this, my bad. Thanks for the update, and sorry for the noise!