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From: Andi Shyti <andi.shyti@linux.intel.com>
To: Jiasheng Jiang <jiashengjiangcool@gmail.com>
Cc: nirmoy.das@linux.intel.com, jani.nikula@linux.intel.com,
	joonas.lahtinen@linux.intel.com, rodrigo.vivi@intel.com,
	tursulin@ursulin.net, airlied@gmail.com, daniel@ffwll.ch,
	chris@chris-wilson.co.uk, intel-gfx@lists.freedesktop.org,
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	Jiasheng Jiang <jiashengjiangcool@outlook.com>,
	stable@vger.kernel.org, Nirmoy Das <nirmoy.das@intel.com>
Subject: Re: [PATCH RESEND v2] drm/i915: Fix memory leak by correcting cache object name in error handler
Date: Wed, 4 Dec 2024 22:45:56 +0100	[thread overview]
Message-ID: <Z1DNlAPvPNtgpMXO@ashyti-mobl2.lan> (raw)
In-Reply-To: <20241127201042.29620-1-jiashengjiangcool@gmail.com>

Hi Jiasheng,

On Wed, Nov 27, 2024 at 08:10:42PM +0000, Jiasheng Jiang wrote:
> From: Jiasheng Jiang <jiashengjiangcool@outlook.com>
> 
> Replace "slab_priorities" with "slab_dependencies" in the error handler
> to avoid memory leak.
> 
> Fixes: 32eb6bcfdda9 ("drm/i915: Make request allocation caches global")
> Cc: <stable@vger.kernel.org> # v5.2+
> Reviewed-by: Nirmoy Das <nirmoy.das@intel.com>
> Signed-off-by: Jiasheng Jiang <jiashengjiangcool@outlook.com>

merged to drm-intel-next.

Thanks,
Andi

      parent reply	other threads:[~2024-12-04 21:46 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-27 20:10 Jiasheng Jiang
2024-11-28 11:48 ` Andi Shyti
2024-12-04 21:45 ` Andi Shyti [this message]

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