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Mon, 09 Dec 2024 18:58:18 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4B9IwILX029061 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 9 Dec 2024 18:58:18 GMT Received: from hu-wasimn-hyd.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 9 Dec 2024 10:58:12 -0800 Date: Tue, 10 Dec 2024 00:28:08 +0530 From: Wasim Nazir To: Krzysztof Kozlowski CC: Konrad Dybcio , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , , , Subject: Re: [PATCH v3 5/5] arm64: dts: qcom: Add support for QCS9075 Ride & Ride-r3 Message-ID: References: <20241119174954.1219002-1-quic_wasimn@quicinc.com> <20241119174954.1219002-6-quic_wasimn@quicinc.com> <9e351979-be01-4d38-9b94-cc23efac4c3f@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: JdIGhfQ1ZL2dmwIG6bcH-qTc6QRCZglU X-Proofpoint-ORIG-GUID: JdIGhfQ1ZL2dmwIG6bcH-qTc6QRCZglU X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 clxscore=1015 malwarescore=0 lowpriorityscore=0 mlxlogscore=771 priorityscore=1501 spamscore=0 impostorscore=0 adultscore=0 bulkscore=0 phishscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412090147 On Fri, Dec 06, 2024 at 01:49:51PM +0100, Krzysztof Kozlowski wrote: > On 06/12/2024 13:14, Konrad Dybcio wrote: > >>>> diff --git a/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts b/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts > >>>> new file mode 100644 > >>>> index 000000000000..a04c8d1fa258 > >>>> --- /dev/null > >>>> +++ b/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts > >>>> @@ -0,0 +1,12 @@ > >>>> +// SPDX-License-Identifier: BSD-3-Clause > >>>> +/* > >>>> + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. > >>>> + */ > >>>> +/dts-v1/; > >>>> + > >>>> +#include "sa8775p-ride-r3.dts" > >>> No guys, you are making these things up. This is EXACTLY the same as > >>> qcs9100. > >> > >> 9100 & 9075 are different from “safe” perspective. They differ in > >> changes related to thermal which will be added later in devicetree. > > > > Since this can't be inferred from just looking at the changes, please > > make sure to add that to the commit message > > Any include of other DTS is clear sign something is odd here. Including > multiple times without any added nodes is showing these are not real > products/boards . We're adding DTS to reuse the common board changes, with plans to include the differences in upcoming patches. To provide more clarity, I will include patches in this series to highlight the differences between the 9100 and 9075 boards. > Best regards, > Krzysztof Thanks & Regards, Wasim