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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-801d5a90d1fsm3622789a12.3.2024.12.16.10.14.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Dec 2024 10:14:27 -0800 (PST) Date: Mon, 16 Dec 2024 10:14:25 -0800 From: Bjorn Andersson To: Renjiang Han Cc: Stanimir Varbanov , Vikash Garodia , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Stanimir Varbanov , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v4 3/4] arm64: dts: qcom: add venus node for the qcs615 Message-ID: References: <20241213-add-venus-for-qcs615-v4-0-7e2c9a72d309@quicinc.com> <20241213-add-venus-for-qcs615-v4-3-7e2c9a72d309@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20241213-add-venus-for-qcs615-v4-3-7e2c9a72d309@quicinc.com> X-Proofpoint-ORIG-GUID: ihnnkSCuVLlCO7ICvHUNUKeeVc4zHRdR X-Proofpoint-GUID: ihnnkSCuVLlCO7ICvHUNUKeeVc4zHRdR X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 mlxlogscore=959 spamscore=0 malwarescore=0 lowpriorityscore=0 mlxscore=0 phishscore=0 suspectscore=0 priorityscore=1501 bulkscore=0 clxscore=1015 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412160151 On Fri, Dec 13, 2024 at 03:26:48PM +0530, Renjiang Han wrote: Subject should be prefixed per the file being changed, i.e: "arm64: dts: qcom: qcs615: Add Venus" > Add venus node into devicetree for the qcs615 video and fallback > qcs615 to sc7180 due to the same video core. > > Signed-off-by: Renjiang Han > --- > arch/arm64/boot/dts/qcom/qcs615.dtsi | 86 ++++++++++++++++++++++++++++++++++++ > 1 file changed, 86 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi > index 37a189e0834d2f4b75ed9deb6fff73da163cb3a3..c08da80c7fd8fa8c69aff04b14784b821ce3ea13 100644 > --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi > +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi > @@ -427,6 +427,11 @@ smem_region: smem@86000000 { > no-map; > hwlocks = <&tcsr_mutex 3>; > }; > + > + pil_video_mem: pil-video@93400000 { > + reg = <0x0 0x93400000 0x0 0x500000>; > + no-map; > + }; > }; > > soc: soc@0 { > @@ -2806,6 +2811,87 @@ gem_noc: interconnect@9680000 { > qcom,bcm-voters = <&apps_bcm_voter>; > }; > > + venus: video-codec@aa00000 { > + compatible = "qcom,qcs615-venus", "qcom,sc7180-venus"; > + reg = <0x0 0x0aa00000 0x0 0x100000>; > + interrupts = ; > + > + clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>, > + <&videocc VIDEO_CC_VENUS_AHB_CLK>, > + <&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>, > + <&videocc VIDEO_CC_VCODEC0_CORE_CLK>, > + <&videocc VIDEO_CC_VCODEC0_AXI_CLK>; > + clock-names = "core", > + "iface", > + "bus", > + "vcodec0_core", > + "vcodec0_bus"; > + > + power-domains = <&videocc VENUS_GDSC>, > + <&videocc VCODEC0_GDSC>, > + <&rpmhpd RPMHPD_CX>; > + power-domain-names = "venus", > + "vcodec0", > + "cx"; > + > + operating-points-v2 = <&venus_opp_table>; > + > + interconnects = <&mmss_noc MASTER_VIDEO_P0 QCOM_ICC_TAG_ALWAYS > + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, > + <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS > + &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ALWAYS>; > + interconnect-names = "video-mem", > + "cpu-cfg"; > + > + iommus = <&apps_smmu 0xe40 0x20>; > + > + memory-region = <&pil_video_mem>; > + > + status = "disabled"; > + > + video-decoder { > + compatible = "venus-decoder"; > + }; > + > + video-encoder { > + compatible = "venus-encoder"; > + }; > + > + venus_opp_table: opp-table { 'o' < 'v', so this should come above video-decoder. Regards, Bjorn > + compatible = "operating-points-v2"; > + > + opp-133330000 { > + opp-hz = /bits/ 64 <133330000>; > + required-opps = <&rpmhpd_opp_low_svs>; > + }; > + > + opp-240000000 { > + opp-hz = /bits/ 64 <240000000>; > + required-opps = <&rpmhpd_opp_svs>; > + }; > + > + opp-300000000 { > + opp-hz = /bits/ 64 <300000000>; > + required-opps = <&rpmhpd_opp_svs_l1>; > + }; > + > + opp-380000000 { > + opp-hz = /bits/ 64 <380000000>; > + required-opps = <&rpmhpd_opp_nom>; > + }; > + > + opp-410000000 { > + opp-hz = /bits/ 64 <410000000>; > + required-opps = <&rpmhpd_opp_turbo>; > + }; > + > + opp-460000000 { > + opp-hz = /bits/ 64 <460000000>; > + required-opps = <&rpmhpd_opp_turbo_l1>; > + }; > + }; > + }; > + > videocc: clock-controller@ab00000 { > compatible = "qcom,qcs615-videocc"; > reg = <0 0xab00000 0 0x10000>; > > -- > 2.34.1 >