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Tue, 28 Jan 2025 05:25:08 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 50S5P78j024739 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 28 Jan 2025 05:25:07 GMT Received: from hu-varada-blr.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 27 Jan 2025 21:25:01 -0800 Date: Tue, 28 Jan 2025 10:54:58 +0530 From: Varadarajan Narayanan To: Konrad Dybcio CC: , , , , , , , , , , , , , , , , , , Subject: Re: [PATCH v8 2/7] phy: qcom: Introduce PCIe UNIPHY 28LP driver Message-ID: References: <20250127072850.3777975-1-quic_varada@quicinc.com> <20250127072850.3777975-3-quic_varada@quicinc.com> <60d02c55-0d18-4704-9126-8b8ffef5bd68@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <60d02c55-0d18-4704-9126-8b8ffef5bd68@oss.qualcomm.com> X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: YM0f33nQZSQLNgtWPPsR5ngfk5TBKTml X-Proofpoint-ORIG-GUID: YM0f33nQZSQLNgtWPPsR5ngfk5TBKTml X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-01-28_01,2025-01-27_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 mlxscore=0 malwarescore=0 clxscore=1015 adultscore=0 impostorscore=0 lowpriorityscore=0 priorityscore=1501 mlxlogscore=906 spamscore=0 phishscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2501280038 On Mon, Jan 27, 2025 at 04:16:32PM +0100, Konrad Dybcio wrote: > On 27.01.2025 8:28 AM, Varadarajan Narayanan wrote: > > From: Nitheesh Sekar > > > > Add Qualcomm PCIe UNIPHY 28LP driver support present > > in Qualcomm IPQ5332 SoC and the phy init sequence. > > > > Reviewed-by: Dmitry Baryshkov > > Signed-off-by: Nitheesh Sekar > > Signed-off-by: Varadarajan Narayanan > > --- > > [...] > > > + usleep_range(CLK_EN_DELAY_MIN_US, CLK_EN_DELAY_MAX_US); > > + > > + qcom_uniphy_pcie_init(phy); > > + return 0; > > Please add a newline before the return statement > > [...] > > > +static int qcom_uniphy_pcie_probe(struct platform_device *pdev) > > +{ > > + struct phy_provider *phy_provider; > > + struct device *dev = &pdev->dev; > > + struct qcom_uniphy_pcie *phy; > > + struct phy *generic_phy; > > + int ret; > > + > > + phy = devm_kzalloc(&pdev->dev, sizeof(*phy), GFP_KERNEL); > > + if (!phy) > > + return -ENOMEM; > > + > > + platform_set_drvdata(pdev, phy); > > + phy->dev = &pdev->dev; > > + > > + phy->data = of_device_get_match_data(dev); > > + if (!phy->data) > > + return -EINVAL; > > + > > + phy->lanes = 1; > > + if (of_property_read_u32(dev_of_node(dev), "num-lanes", &phy->lanes)) > > + dev_info(dev, "Not able to get num-lanes. Assuming 1\n"); > > return dev_err_probe(dev, ret, "Couldn't read num-lanes\n"); > > And please make num-lanes required in bindings there > > We don't want silent fallbacks in such cases, as it's easy to miss those and > e.g. ship a product which would then run the PCIe link at half the speed Sure, will post a new version. Thanks Varada