On Thu, Jan 30, 2025 at 01:05:49AM +0200, Vladimir Oltean wrote:
> On Wed, Jan 29, 2025 at 10:05:20PM +0000, Russell King (Oracle) wrote:
> > For Vladimir: I've added four hacky patches that build on top of the
> > large RFC series I sent earlier which add probably saner configuration
> > for the SGMII code, hopefully making it more understandable in light
> > of Wangxun's TXGBE using PHY mode there (they were adamant that their
> > hardware requires it.) These do not address Tristram's issue.
> 
> Ok, let's sidetrack Tristram's thread, sure.

... and this is no longer a side track, because one of the changes in
Tristram's patches is to manually update the BMCR register on link-up
in SGMII mode, because the older XPCS hardware doesn't support
MAC_AUTO_SW. So, here's a patch that splits DW_XPCS_SGMII_MODE_MAC
introduced in the last patch into an _AUTO and _MANUAL variant.

The intention is - once we work out how to detect the older hardware -
that instead of DW_XPCS_SGMII_MODE_MAC_AUTO being used, Tristram sets
DW_XPCS_SGMII_MODE_MAC_MANUAL, which will attempt to clear MAC_AUTO_SW
(it's not clear to me that this can be done given the information that
Tristram has mentioned thus far - but I don't think that matters) and
xpcs_link_up_sgmii_1000basex() will program the BMCR.

This gives us a single control to enable this behaviour, rather than
introducing a quirk for it. Setting DW_XPCS_SGMII_MODE_MAC_MANUAL with
newer hardware allows these code paths to be tested there as well.

See the attached patch, which builds on top of the four already sent.

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
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