From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DEEF342AAF; Wed, 5 Mar 2025 08:31:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741163463; cv=none; b=kKsRXfwR3/8QXICr7K12wY1A8sikxMgpshyfK+Z/fQvDGLor5TXyBUbVrvm6hBvCJLrBlAGXVNtcEhen3xOfubMq2BjmURXJfBbL5Rx99u3xHCgCLKMyWD76K5vNrPcw3oxXiW8priYXqx3Z+2F0E2hgkFl5g8L5i/7FdgsuhXY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741163463; c=relaxed/simple; bh=okDqkVAZeMp5yL7AkuXqwEC+7QyMVjPCqidcSs1o0Qw=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=er92fhdFNAZvAWLuYT8rcxXdK0Vc5b8OU7EMn7UjdjMfb8KSD7KgEjDll2+McSifsBiTtPK1CxfW0TaZM504G8BIMylFdCBoij+N/VPhXOS58vGjyqy3ssV6wgLrILNR9KZwQM54IMH/6C8EeSiD9zMTF2dWrLgvq4Tp6YeJpz8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=fgoVHxWZ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="fgoVHxWZ" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3B9C5C4CEE9; Wed, 5 Mar 2025 08:31:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741163462; bh=okDqkVAZeMp5yL7AkuXqwEC+7QyMVjPCqidcSs1o0Qw=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=fgoVHxWZza7iBpVfg1WoFHiLOBvm+Hgv7JkLzt3hl/2mNj5J++YVQhV7HbD0D3lGp JeHmz8P6+z9FTM4O1uhD7nzROQMZIrdqjgFb/XxIq6XbKQIwJsQmNd9ian/ZTM5skt JvKjMNSFJqkmILQXVaMzEyEAGTutAHJzbw504Kxpio0nZNRvaCzCJoAJulqPD5A6Js Uf6l5NQSkS0iOb/wmyCevWzf/VPKydhRZIKEmwh5QuKbLk8oOWY3hcvg5FBhrscIx0 7Jgzeo7NX0eNCj7h/9JKiyfneofaObIVCzlgFoUi4fd9JKzK9SnVh62U9/uz241Qiv DH44qGi/2wxuw== Received: from johan by xi.lan with local (Exim 4.97.1) (envelope-from ) id 1tpk9Z-000000004XF-1eNj; Wed, 05 Mar 2025 09:30:58 +0100 Date: Wed, 5 Mar 2025 09:30:57 +0100 From: Johan Hovold To: Konrad Dybcio Cc: Johan Hovold , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 0/8] arm64: dts: qcom: x1e: mark l12b and l15b always-on Message-ID: References: <20250227081357.25971-1-johan+linaro@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Tue, Mar 04, 2025 at 06:07:32PM +0100, Konrad Dybcio wrote: > On 27.02.2025 9:13 AM, Johan Hovold wrote: > > The l12b and l15b supplies are used by components that are not (fully) > > described (and some never will be) and must never be disabled. > > > > Mark the regulators as always-on to prevent them from being disabled, > > for example, when consumers probe defer or suspend. > > > > Note that there are likely votes from other processors for these rpmh > > regulators (at least for l15b) but the OS should not rely on that in any > > case. > > > > Included is also a patch that adds the missing HID supplies for the > > T14s. It was a corresponding change for the CRD that made me look into > > this to make sure these supplies were not disabled during suspend or on > > probe deferrals. > This looks good, too bad SL7 was left out :( I'll take care of that > myself Thanks for catching that. It seems my grep pattern was too specific given that you had dropped the voltages from the SL7 regulator labels whereas every other X1 board copy-pasted the CRD which had them: vreg_l12b_1p2: ldo12 { vreg_l12b: ldo12 { Like you, I'd prefer if they were not there (especially since they are not even correct with 3 V rails having "2p9" suffixes), but I see now that this pattern have been used also for some older Qualcomm machines. Perhaps we can drop them throughout, at least for X1, for consistency. > Reviewed-by: Konrad Dybcio Thanks for reviewing. Johan