From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from fgw20-7.mail.saunalahti.fi (fgw20-7.mail.saunalahti.fi [62.142.5.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2CF2B1624F2 for ; Thu, 6 Mar 2025 07:15:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=62.142.5.81 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741245353; cv=none; b=YpleVz16GVSdqaFe53387Ifikt3AHPD3X8Ve8FQmuxGK9SfAvsfhdVbE6yoIWHW3I5MJBkCXSnksNmGyJooSOymxbMqeaCfQv8XCZrPjhhcXEs4dcKlQ47LxckUa81wL8c78JDTuLjeU9qTFZTxEjieRPMUPOdUzFFX9mK66W+g= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741245353; c=relaxed/simple; bh=wGfAs74KCaUlJxPiFDfFiHceEtknho+iBeYZPc/m/SM=; h=From:Date:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=dbjwpV0ijLzuvwCkH/GCuPgZrMgM9viZBICYA4Dd8n2dGEI9K5j8R+Df+4HReLbJRFsRtYmFmI9DkRuL9r6WoAu6KW6AMv3AbbtBEWE5/ILxn4DKp7ms/+Zu/cVfzbestJLs9cWw2lzaZtxcz2gBjCE6o/ExrFA/L2+EiR22SJs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com; spf=fail smtp.mailfrom=gmail.com; arc=none smtp.client-ip=62.142.5.81 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=gmail.com Received: from localhost (88-113-26-232.elisa-laajakaista.fi [88.113.26.232]) by fgw21.mail.saunalahti.fi (Halon) with ESMTP id cef8990e-fa5a-11ef-8397-005056bdd08f; Thu, 06 Mar 2025 09:15:42 +0200 (EET) From: Andy Shevchenko Date: Thu, 6 Mar 2025 09:15:39 +0200 To: Choong Yong Liang Cc: Simon Horman , Jose Abreu , Jose Abreu , David E Box , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H . Peter Anvin" , Rajneesh Bhardwaj , David E Box , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , Jiawen Wu , Mengyuan Lou , Heiner Kallweit , Russell King , Hans de Goede , Ilpo =?iso-8859-1?Q?J=E4rvinen?= , Richard Cochran , Serge Semin , x86@kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH net-next v9 5/6] net: stmmac: configure SerDes according to the interface mode Message-ID: References: <20250227121522.1802832-1-yong.liang.choong@linux.intel.com> <20250227121522.1802832-6-yong.liang.choong@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250227121522.1802832-6-yong.liang.choong@linux.intel.com> Thu, Feb 27, 2025 at 08:15:21PM +0800, Choong Yong Liang kirjoitti: > Intel platform will configure the SerDes through PMC API based on the > provided interface mode. > This patch adds several new functions below:- > - intel_tsn_lane_is_available(): This new function reads FIA lane > ownership registers and common lane registers through IPC commands > to know which lane the mGbE port is assigned to. > - intel_mac_finish(): To configure the SerDes based on the assigned > lane and latest interface mode, it sends IPC command to the PMC through > PMC driver/API. The PMC acts as a proxy for R/W on behalf of the driver. > - intel_set_reg_access(): Set the register access to the available TSN > interface. ... > config DWMAC_INTEL > default X86 > depends on X86 && STMMAC_ETH && PCI > depends on COMMON_CLK > + depends on ACPI Stray and unexplained change. Please, fix it. We don't need the dependencies which are not realised in the compile time. -- With Best Regards, Andy Shevchenko