From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3801EC77B7F for ; Thu, 11 May 2023 17:16:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238901AbjEKRQo (ORCPT ); Thu, 11 May 2023 13:16:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49884 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238496AbjEKRQm (ORCPT ); Thu, 11 May 2023 13:16:42 -0400 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EF88C6597; Thu, 11 May 2023 10:16:40 -0700 (PDT) Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.96) (envelope-from ) id 1px9u9-0001cR-35; Thu, 11 May 2023 17:16:38 +0000 Date: Thu, 11 May 2023 19:14:48 +0200 From: Daniel Golle To: Andrew Lunn Cc: netdev@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , AngeloGioacchino Del Regno Subject: Re: [PATCH net-next 0/8] Improvements for RealTek 2.5G Ethernet PHYs Message-ID: References: <55c11fd9-54cf-4460-a10c-52ff62b46a4c@lunn.ch> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <55c11fd9-54cf-4460-a10c-52ff62b46a4c@lunn.ch> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, May 11, 2023 at 02:28:15AM +0200, Andrew Lunn wrote: > On Thu, May 11, 2023 at 12:53:22AM +0200, Daniel Golle wrote: > > Improve support for RealTek 2.5G Ethernet PHYs (RTL822x series). > > The PHYs can operate with Clause-22 and Clause-45 MDIO. > > > > When using Clause-45 it is desireable to avoid rate-adapter mode and > > rather have the MAC interface mode follow the PHY speed. The PHYs > > support 2500Base-X for 2500M, and Cisco SGMII for 1000M/100M/10M. > > I don't see what clause-45 has to do with this. The driver knows that > both C22 and C45 addresses spaces exists in the hardware. It can do > reads/writes on both. If the bus master does not support C45, C45 over > C22 will be performed by the core. My understanding is/was that switching the SerDes interface mode is only intended with Clause-45 PHYs, derived from this comment and code: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/net/phy/phylink.c#n1661 Hence I concluded that for Clause-22 PHYs we expect the interface mode to always remain the same, while many Clause-45 PHYs require switching the SerDes interface mode depending on the speed of the external link. Trying to use interface mode switching (in the .read_status function) with is_c45 == false also just didn't work well: https://github.com/openwrt/openwrt/pull/11990#issuecomment-1503160296 Up to 1000M this has no really been a problem, as the Cisco SGMII SerDes supports 10M, 100M and 1000M speeds. Starting with 2500M things have became more complicated, and we usually have the choice of either have the MAC<->PHY link operate at a contant mode and speed (e.g. 2500Base-X) or having to switch the MAC<->PHY interface mode (e.g. between 2500Base-X and SGMII) depending on whether the link speed on the external interface is 2500M or not. Looking at PHYs which support speeds beyond one gigabit/sec due to the higher complexity and need for a larger register space most of them are managed using Clause-45 MDIO. 2500Base-T PHYs are kind of the exception because some of them (esp. RealTek) are still mostly being managed using Clause-22 MDIO using proprietary paging mechanisms to enlarge the register space. I also don't like overloading the meaning of is_c45 to decide whether rate-adapter mode should be used or not, neither do I like the idea to tie the use of phylink to using SGMII in-band-status or not -- but at this point both do correlate and there aren't any other feature flags or validation methods to do it in a better way. In the end this can also just be solved by documenation, ie. makeing sure that those facts are well understood: interface mode switching only being supported when using Clause-45 MDIO and also the fact that phylink expects operating Cisco SGMII without in-band-status when connecting to a managed PHY.