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From: Bjorn Helgaas <helgaas@kernel.org>
To: Mario Limonciello <mario.limonciello@amd.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	Mika Westerberg <mika.westerberg@linux.intel.com>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	S-k Shyam-sundar <Shyam-sundar.S-k@amd.com>,
	Natikar Basavaraj <Basavaraj.Natikar@amd.com>,
	Deucher Alexander <Alexander.Deucher@amd.com>,
	Iain Lane <iain@orangesquash.org.uk>,
	Lukas Wunner <lukas@wunner.de>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	linux-pm@vger.kernel.org
Subject: Re: [PATCH v2] PCI: Don't assume root ports from > 2015 are power manageable
Date: Tue, 23 May 2023 15:35:18 -0500	[thread overview]
Message-ID: <ZG0jhvzAZnfscSeC@bhelgaas> (raw)
In-Reply-To: <20230517150827.89819-1-mario.limonciello@amd.com>

[+cc Rafael, Lukas, linux-pm]

On Wed, May 17, 2023 at 10:08:27AM -0500, Mario Limonciello wrote:
> Using an XHCI device to wakeup the system from s2idle fails when
> that XHCI device is connected to a USB-C port for an AMD USB4
> router.

Are XHCI, USB-C, and the AMD USB4 router just examples?  I assume the
same issue could happen with non-XHCI and non-AMD devices, too?

I assume the problem has something to do with PME_Support and some
device being put in a power state where it cannot generate or forward
PME messages?  I think the PCIe protocol details would be helpful
here.

> Due to commit 9d26d3a8f1b0 ("PCI: Put PCIe ports into D3 during
> suspend") all root port go into D3 during s2idle.
> When the root ports are in D3 over s2idle it's not possible for the
> platform firmware to properly identify the wakeup source.

I'm not sure what the critical device is here.  9d26d3a8f1b0 and the
current pci_bridge_d3_possible() are not specific to Root Ports.  The
PCIe protocol details would probably clear this up.

> Comparing registers between Linux and Windows 11 this behavior to put root
> ports into D3 at suspend is unique to Linux.  On an affected system
> Windows does not put the root ports into D3 over Modern Standby.
> 
> Windows doesn't put the root ports into D3 because root ports are not
> power manageable; they're missing _PRW and _S0W.

platform_pci_power_manageable() tests adev->flags.power_manageable,
which is set by acpi_bus_get_power_flags() when a device has _PS0 or
_PR0.

So I don't know what's relevant out of _PRW, _S0W, _PS0, _PR0, but
this sentence doesn't seem to match the code.

> Linux shouldn't be assuming they support D3 just because they're newer
> than 2015, the ports should also be deemed power manageable.
> Add an extra check for this to ensure D3 isn't selected for such machines.

Is this talking about D3hot or D3cold or both?  If we can make this
explicit, it will help me out.  It's probably obvious to power
experts, but I'm not one.

> Fixes: 9d26d3a8f1b0 ("PCI: Put PCIe ports into D3 during suspend")
> Reported-by: Iain Lane <iain@orangesquash.org.uk>
> Closes: https://forums.lenovo.com/t5/Ubuntu/Z13-can-t-resume-from-suspend-with-external-USB-keyboard/m-p/5217121
> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
> ---
>  drivers/pci/pci.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> index 5ede93222bc1..3fe27aef09e6 100644
> --- a/drivers/pci/pci.c
> +++ b/drivers/pci/pci.c
> @@ -3010,6 +3010,9 @@ bool pci_bridge_d3_possible(struct pci_dev *bridge)
>  		if (dmi_check_system(bridge_d3_blacklist))
>  			return false;
>  
> +		if (!platform_pci_power_manageable(bridge))
> +			return false;
> +
>  		/*
>  		 * It should be safe to put PCIe ports from 2015 or newer
>  		 * to D3.
> -- 
> 2.34.1
> 

  parent reply	other threads:[~2023-05-23 20:35 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-17 15:08 Mario Limonciello
2023-05-22  5:55 ` Mika Westerberg
2023-05-22 11:28   ` Mario Limonciello
2023-05-22 11:40     ` Mika Westerberg
2023-05-23 20:35 ` Bjorn Helgaas [this message]
2023-05-23 21:29   ` Limonciello, Mario
2023-05-24 10:17     ` Rafael J. Wysocki

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