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[213.179.129.39]) by smtp.gmail.com with ESMTPSA id l6-20020adff486000000b00313fd294d6csm7414075wro.7.2023.06.29.03.03.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Jun 2023 03:03:22 -0700 (PDT) Date: Thu, 29 Jun 2023 12:03:21 +0200 From: Jiri Pirko To: Vitaly Grinberg Cc: "Kubalewski, Arkadiusz" , David Airlie , andy.ren@getcruise.com, anthony.l.nguyen@intel.com, arnd@arndb.de, axboe@kernel.dk, Benjamin Tissoires , claudiajkang@gmail.com, corbet@lwn.net, davem@davemloft.net, edumazet@google.com, geert+renesas@glider.be, gregkh@linuxfoundation.org, hkallweit1@gmail.com, idosch@nvidia.com, intel-wired-lan@lists.osuosl.org, jacek.lawrynowicz@linux.intel.com, Javier Martinez Canillas , jesse.brandeburg@intel.com, jonathan.lemon@gmail.com, kuba@kernel.org, kuniyu@amazon.com, leon@kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rdma@vger.kernel.org, linux@zary.sk, liuhangbin@gmail.com, lucien.xin@gmail.com, masahiroy@kernel.org, michal.michalik@intel.com, milena.olech@intel.com, Michal Schmidt , Michael Tsirkin , netdev@vger.kernel.org, nicolas.dichtel@6wind.com, nipun.gupta@amd.com, ogabbay@kernel.org, Paolo Abeni , phil@nwl.cc, Petr Oros , razor@blackwall.org, ricardo.canuelo@collabora.com, richardcochran@gmail.com, saeedm@nvidia.com, sj@kernel.org, tzimmermann@suse.de, vadfed@fb.com, vadfed@meta.com, vadim.fedorenko@linux.dev Subject: Re: [RFC PATCH v8 00/10] Create common DPLL configuration API Message-ID: References: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Thu, Jun 29, 2023 at 10:26:28AM CEST, vgrinber@redhat.com wrote: >Hi Jiri, >We are pushing for it to be implemented in Intel Ice driver. It does not have to be part of the initial submission. It can be extended later on. Also, not possible to define the UAPI without actual driver implementation. >Thanks, >Vitaly > >On Thu, Jun 29, 2023 at 11:22 AM Jiri Pirko wrote: >> >> Thu, Jun 22, 2023 at 09:44:19AM CEST, vgrinber@redhat.com wrote: >> >Hi, >> >Could it be possible to add PPS DPLL phase offset to the netlink API? We >> >are relying on it in the E810-based grandmaster implementation. >> >> In which driver you need to implement this? >> >> >> >Thanks, >> >Vitaly >> >