From: Xu Yilun <yilun.xu@intel.com>
To: Marco Pagani <marpagan@redhat.com>
Cc: Moritz Fischer <mdf@kernel.org>, Wu Hao <hao.wu@intel.com>,
Tom Rix <trix@redhat.com>,
linux-kernel@vger.kernel.org, linux-fpga@vger.kernel.org
Subject: Re: [PATCH v8 1/4] fpga: add an initial KUnit suite for the FPGA Manager
Date: Mon, 10 Jul 2023 12:44:18 +0800 [thread overview]
Message-ID: <ZKuMosEu242BrY0K@yilunxu-OptiPlex-7050> (raw)
In-Reply-To: <20230630152507.30219-2-marpagan@redhat.com>
On 2023-06-30 at 17:25:04 +0200, Marco Pagani wrote:
> The suite tests the basic behaviors of the FPGA Manager including
> programming using a single contiguous buffer and a scatter gather table.
>
> Signed-off-by: Marco Pagani <marpagan@redhat.com>
> ---
> drivers/fpga/tests/fpga-mgr-test.c | 311 +++++++++++++++++++++++++++++
> 1 file changed, 311 insertions(+)
> create mode 100644 drivers/fpga/tests/fpga-mgr-test.c
>
> diff --git a/drivers/fpga/tests/fpga-mgr-test.c b/drivers/fpga/tests/fpga-mgr-test.c
> new file mode 100644
> index 000000000000..6fd2e235f195
> --- /dev/null
> +++ b/drivers/fpga/tests/fpga-mgr-test.c
> @@ -0,0 +1,311 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * KUnit test for the FPGA Manager
> + *
> + * Copyright (C) 2023 Red Hat, Inc.
> + *
> + * Author: Marco Pagani <marpagan@redhat.com>
> + */
> +
> +#include <kunit/test.h>
> +#include <linux/device.h>
> +#include <linux/fpga/fpga-mgr.h>
> +#include <linux/module.h>
> +#include <linux/scatterlist.h>
> +#include <linux/types.h>
> +
> +#define HEADER_FILL 'H'
> +#define IMAGE_FILL 'P'
> +#define IMAGE_BLOCK 1024
> +
> +#define HEADER_SIZE IMAGE_BLOCK
> +#define IMAGE_SIZE (IMAGE_BLOCK * 4)
> +
> +struct mgr_stats {
> + bool header_match;
> + bool image_match;
> + u32 seq_num;
> + u32 op_parse_header_seq;
> + u32 op_write_init_seq;
> + u32 op_write_seq;
> + u32 op_write_sg_seq;
> + u32 op_write_complete_seq;
> + enum fpga_mgr_states op_parse_header_state;
> + enum fpga_mgr_states op_write_init_state;
> + enum fpga_mgr_states op_write_state;
> + enum fpga_mgr_states op_write_sg_state;
> + enum fpga_mgr_states op_write_complete_state;
> +};
> +
> +struct mgr_ctx {
> + struct fpga_image_info *img_info;
> + struct fpga_manager *mgr;
> + struct platform_device *pdev;
> + struct mgr_stats stats;
> +};
> +
> +/**
> + * init_test_buffer() - Allocate and initialize a test image in a buffer.
> + * @test: KUnit test context object.
> + * @count: image size in bytes.
> + *
> + * Return: pointer to the newly allocated image.
> + */
> +static char *init_test_buffer(struct kunit *test, size_t count)
> +{
> + char *buf;
> +
> + KUNIT_ASSERT_GE(test, count, HEADER_SIZE);
> +
> + buf = kunit_kzalloc(test, count, GFP_KERNEL);
> + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, buf);
> +
> + memset(buf, HEADER_FILL, HEADER_SIZE);
> + memset(buf + HEADER_SIZE, IMAGE_FILL, count - HEADER_SIZE);
> +
> + return buf;
> +}
> +
> +static int op_parse_header(struct fpga_manager *mgr, struct fpga_image_info *info,
> + const char *buf, size_t count)
> +{
> + struct mgr_stats *stats = mgr->priv;
> + size_t i;
> +
> + /* Set header_size and data_size for later */
> + info->header_size = HEADER_SIZE;
> + info->data_size = info->count - HEADER_SIZE;
> +
> + stats->header_match = true;
> +
> + /* Check header */
> + for (i = 0; i < info->header_size; i++)
> + if (buf[i] != HEADER_FILL)
> + stats->header_match = false;
> +
> + stats->op_parse_header_state = mgr->state;
> + stats->op_parse_header_seq = stats->seq_num++;
> +
> + return 0;
> +}
> +
> +static int op_write_init(struct fpga_manager *mgr, struct fpga_image_info *info,
> + const char *buf, size_t count)
> +{
> + struct mgr_stats *stats = mgr->priv;
> +
> + stats->op_write_init_state = mgr->state;
> + stats->op_write_init_seq = stats->seq_num++;
> +
> + return 0;
> +}
> +
> +static int op_write(struct fpga_manager *mgr, const char *buf, size_t count)
> +{
> + struct mgr_stats *stats = mgr->priv;
> + size_t i;
> +
> + /* Check the image */
> + stats->image_match = true;
> + for (i = 0; i < count; i++)
> + if (buf[i] != IMAGE_FILL)
> + stats->image_match = false;
> +
> + stats->op_write_state = mgr->state;
> + stats->op_write_seq = stats->seq_num++;
> +
> + return 0;
> +}
> +
> +static int op_write_sg(struct fpga_manager *mgr, struct sg_table *sgt)
> +{
> + struct mgr_stats *stats = mgr->priv;
> + struct sg_mapping_iter miter;
> + char *img;
> + size_t i;
> +
> + /*
> + * Check the image, but first skip the header since write_sg will get
> + * the whole image in sg_table.
> + */
> + stats->image_match = true;
> + sg_miter_start(&miter, sgt->sgl, sgt->nents, SG_MITER_FROM_SG);
> +
> + if (!sg_miter_skip(&miter, HEADER_SIZE))
> + stats->image_match = false;
If this fails, should we continue?
> +
> + while (sg_miter_next(&miter)) {
> + img = miter.addr;
> + for (i = 0; i < miter.length; i++) {
> + if (img[i] != IMAGE_FILL)
> + stats->image_match = false;
> + }
> + }
> +
> + sg_miter_stop(&miter);
> +
> + stats->op_write_sg_state = mgr->state;
> + stats->op_write_sg_seq = stats->seq_num++;
> +
> + return 0;
> +}
next prev parent reply other threads:[~2023-07-10 4:45 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-30 15:25 [PATCH v8 0/4] fpga: add initial KUnit tests for the subsystem Marco Pagani
2023-06-30 15:25 ` [PATCH v8 1/4] fpga: add an initial KUnit suite for the FPGA Manager Marco Pagani
2023-07-10 4:44 ` Xu Yilun [this message]
2023-07-11 14:02 ` Marco Pagani
2023-07-12 2:00 ` Xu Yilun
2023-06-30 15:25 ` [PATCH v8 2/4] fpga: add an initial KUnit suite for the FPGA Bridge Marco Pagani
2023-06-30 15:25 ` [PATCH v8 3/4] fpga: add an initial KUnit suite for the FPGA Region Marco Pagani
2023-06-30 15:25 ` [PATCH v8 4/4] fpga: add configuration for the FPGA KUnit test suites Marco Pagani
2023-07-10 4:47 ` Xu Yilun
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