From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=3.0 tests=BAYES_00,DATE_IN_PAST_12_24, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 95A9EC43381 for ; Fri, 12 Mar 2021 11:53:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5EB7064FD9 for ; Fri, 12 Mar 2021 11:53:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231702AbhCLLwp convert rfc822-to-8bit (ORCPT ); Fri, 12 Mar 2021 06:52:45 -0500 Received: from aposti.net ([89.234.176.197]:38758 "EHLO aposti.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231352AbhCLLwP (ORCPT ); Fri, 12 Mar 2021 06:52:15 -0500 Date: Thu, 11 Mar 2021 13:40:47 +0000 From: Paul Cercueil Subject: Re: [PATCH v2 5/5] drm/ingenic: Add option to alloc cached GEM buffers To: Christoph Hellwig Cc: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Sam Ravnborg , od@zcrc.me, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org Message-Id: In-Reply-To: <20210311123040.GD1739082@infradead.org> References: <20210307202835.253907-1-paul@crapouillou.net> <20210307202835.253907-6-paul@crapouillou.net> <20210311123040.GD1739082@infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1; format=flowed Content-Transfer-Encoding: 8BIT Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Le jeu. 11 mars 2021 à 12:30, Christoph Hellwig a écrit : > On Sun, Mar 07, 2021 at 08:28:35PM +0000, Paul Cercueil wrote: >> With the module parameter ingenic-drm.cached_gem_buffers, it is >> possible >> to specify that we want GEM buffers backed by non-coherent memory. > > Shouldn't there be a way to discover this through a DT property? Good question. My original way of thinking was that as this feature speeds up only software rendering, this is really application-dependent: a modern desktop where everything is rendered via the GPU wouldn't benefit much from it. With that in mind, it is fine as a module option. On the other hand... the "software rendering is faster with non-coherent buffers" really is a SoC property, since it is only true for some generations of Ingenic SoCs and not others. So it would make sense to have a DT property for it. -Paul