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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?iso-8859-1?Q?rklgurMOdg8Yuk5kbQ9EGb54oDo8orRwIFbA09XyVhXemG/Xqm1dSEikCF?= =?iso-8859-1?Q?5/RRESIEN86+OLq98X7oZm5jx5VxdLWsfTGJh6b6rjkiTg+SfYJA9vAB24?= =?iso-8859-1?Q?QBmIMcPOmGQ6ilxPGR3qzT7FC3zX+y2efl6q5SVuwxt6moCUN5AkpWbaQb?= =?iso-8859-1?Q?JlESrcSg/7sFC7XtqaY+9jljbaPpq14PbZwWZ83rEuxY2glftrAQt6ZEBB?= =?iso-8859-1?Q?1OTrT+SPQLFCCHJBxvTyfwTMvMjVloeL2d8YXUF8iZAm4X6iR7KiSCIIrb?= =?iso-8859-1?Q?wNQWTAmhhjLE/5AZzRxBjj3tJ+xbSXV/sCCcZmu0Hx4Qj9oFYyuoZ2Iq49?= =?iso-8859-1?Q?Oh456eFOimsqWL4Qs2arRSMnoPY0V9Bio6weZIlaH3Fk4it3IWvCw2Yv1j?= =?iso-8859-1?Q?P5ankc+ZoY7UOoPQeFoD5Sg6c4lQmuWc6svsS6RXqQiGcVRKBOPkJHW/rW?= =?iso-8859-1?Q?yiQPs9+PS9hxX0U03AsY5HBwrNFc0hZTj0TwAthKilYvhMfHWmVh/AVxBy?= =?iso-8859-1?Q?ZhOgjVhOTplYjWqOgRXLUrrwDR8YW1YYHH6f7nLRrl0i8mTi7pEeazykSO?= =?iso-8859-1?Q?aNRHMIWZ2+q0SuYgJqNbOL0K610BQnNIupE/DC9BZzbI1/H+ThWQB4nWGu?= =?iso-8859-1?Q?gl9LNhrqDCtkMNZnVPAeDRXMAC+JiEWd7vaKcRP1//rx7c/mVymoVVwwYj?= =?iso-8859-1?Q?U9wq19twxqoAt3va8ohNA3/Nxo7BHmJwmyckBh5L0M0UT2OyyHWdFb+kwJ?= =?iso-8859-1?Q?7ycusl7szPwKtj2CbYF4X8V3Zpri8fHallMf23XUA9VfkANq6QZPB8I3UD?= =?iso-8859-1?Q?b1Buy7VZtYQNEaNDB9ucKQF+yea07BZXQbtKD/klcjin8AwL8V6nl/KZFc?= =?iso-8859-1?Q?T4nTYoFivte69QsG9Q03gzBD1AQDnlw9S7Yxw3toHjOcKrvmm71H3c+kID?= =?iso-8859-1?Q?nygWyP/4UZ7dc5j2TpuZq14vOBcJg44hOzOZ7YY2U2nvR1B0rNMsMh3btH?= =?iso-8859-1?Q?wRyAL5g1nCvW1CJl27mt91ac4MJsuWBjmmWTuIFVGrx8i1eG3CJjRemA4x?= =?iso-8859-1?Q?RXgZfoCBOJmuF/DJR+30OK/NNyuJzZ7jaaPWCEvTb/3pz4lt0QaGydZ//z?= =?iso-8859-1?Q?oY44RPGDUpUFuJafw6A5pkR+3tGY5Y69ch1ZsIP8MHrANU9+HfHC6XHNba?= =?iso-8859-1?Q?hNFJFMqXfUZ0brS4czNKB4klZx/Tpgqo0XFf5zex8wk/Vnr8B67U7ys1Gf?= =?iso-8859-1?Q?N2A1+xLrypmhddH/At+a8GXHmiVzON8RffqwhsutbxePooffRl8SIGY1j3?= =?iso-8859-1?Q?VDFiIbrgn2HFXYqVYBW4jb2qfAdEKaB5bgaSrJNwdyponyyF7BgbX8Mppp?= =?iso-8859-1?Q?xePLZEGH3sabYu0zgZNIh3VZlsVo8YKxYCzkPpOfptJvURkWxfOuB/gt/1?= =?iso-8859-1?Q?HAtbF9zumOLp3GhoCh4AnHnd6ZWuTSswnEAXAbUAH69CE9YIPlIwQcq62m?= =?iso-8859-1?Q?xZ6yHtvsfrYsxB4SXevPwP+Ut8iD6eq1+iDoQ14aUnlJTAVhWRiYy5BnYn?= =?iso-8859-1?Q?bpjqBJFR1jWZvvqPLSYy9wgY/e08reofj2Co2B5PrWjUj8fm8KFno7Xm4p?= =?iso-8859-1?Q?B8aMdr4oZkv6QQsyO18SQf7toOGKzO9Shw?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 915de401-b5a8-482e-ce6e-08dbbaeeed5d X-MS-Exchange-CrossTenant-AuthSource: AM6PR04MB4838.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Sep 2023 22:05:55.2352 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: YKZRyF4hpTTepdgOxcixJGHZm0I2sezsTJcoBgBD00YrNjkKzV6DfC7gmS2nCl/sgEhPRoSII5FYDbwNNLMP0A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR04MB6864 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Sep 21, 2023 at 10:04:31PM +0200, Christophe JAILLET wrote: > Le 21/09/2023 à 20:35, Frank Li a écrit : > > On Thu, Sep 21, 2023 at 07:59:51PM +0200, Christophe JAILLET wrote: > > > Le 21/09/2023 à 17:37, Frank Li a écrit : > > > > From: Guanhua Gao > > > > > > > > Set DMA mask and coherent DMA mask to enable 64-bit addressing. > > > > > > > > Signed-off-by: Guanhua Gao > > > > Signed-off-by: Hou Zhiqiang > > > > Signed-off-by: Frank Li > > > > --- > > > > drivers/pci/controller/dwc/pci-layerscape-ep.c | 5 +++++ > > > > 1 file changed, 5 insertions(+) > > > > > > > > diff --git a/drivers/pci/controller/dwc/pci-layerscape-ep.c b/drivers/pci/controller/dwc/pci-layerscape-ep.c > > > > index de4c1758a6c33..6fd0dea38a32c 100644 > > > > --- a/drivers/pci/controller/dwc/pci-layerscape-ep.c > > > > +++ b/drivers/pci/controller/dwc/pci-layerscape-ep.c > > > > @@ -249,6 +249,11 @@ static int __init ls_pcie_ep_probe(struct platform_device *pdev) > > > > pcie->big_endian = of_property_read_bool(dev->of_node, "big-endian"); > > > > + /* set 64-bit DMA mask and coherent DMA mask */ > > > > + if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64))) > > > > + if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32))) > > > > > > As stated in [1], dma_set_mask() with a 64-bit mask will never > > > fail if dev->dma_mask is non-NULL. > > > > > > So, if it fails, the 32 bits case will also fail for the same reason. > > > There is no need for the 2nd test. > > > > > > > > > See [1] for Christoph Hellwig comment about it. > > > > I don't think it is true. the below is dma_set_mask()'s implementation > > I'll try to recollect a more detailled explanation from Christoph. > > I also checked all paths some times ago, and the conclusion was that if > dma_set_mask(64) failed, dma_set_mask(32) would fail for the exact same > reasons. > > I'll try to find the corresponding mail and come back to you. I go through iommu driver and code carefully. You are right. The dma_supported() actual means iommu require minimized dma capatiblity. It is quite miss leading. There are many codes in driver like these pattern. A example: static int sba_dma_supported( struct device *dev, u64 mask)() { ... * check if mask is >= than the current max IO Virt Address * The max IO Virt address will *always* < 30 bits. */ return((int)(mask >= (ioc->ibase - 1 + (ioc->pdir_size / sizeof(u64) * IOVP_SIZE) ))); ... } 1 means supported. 0 means unsupported. So dma_set_mask(64) is enough. Let me send new patch. Frank > > I don't thing that implementation details have changed since that times, so > the conclusion should still be valid. > > Adding Christoph in cc, if he wants to give another look at it, or if he > beats me finding the 1 or 2 years old mails. > > CJ > > > > > int dma_set_mask(struct device *dev, u64 mask) > > { > > /* > > * Truncate the mask to the actually supported dma_addr_t width to > > * avoid generating unsupportable addresses. > > */ > > mask = (dma_addr_t)mask; > > > > if (!dev->dma_mask || !dma_supported(dev, mask)) > > ^^^^^^^ > > return -EIO; > > > > arch_dma_set_mask(dev, mask); > > *dev->dma_mask = mask; > > return 0; > > } > > > > dma_supported() may return failiure. > > > > static int dma_supported(struct device *dev, u64 mask) > > { > > const struct dma_map_ops *ops = get_dma_ops(dev); > > > > /* > > * ->dma_supported sets the bypass flag, so we must always call > > * into the method here unless the device is truly direct mapped. > > */ > > if (!ops) > > return dma_direct_supported(dev, mask); > > if (!ops->dma_supported) > > return 1; > > return ops->dma_supported(dev, mask); > > ^^^^^^ > > DMA driver or IOMMU driver may return failure. > > } > > > > Frank > > > > > > > > CJ > > > > > > > > > [1]: https://lkml.org/lkml/2021/6/7/398 > > > > > > > + return -EIO; > > > > + > > > > platform_set_drvdata(pdev, pcie); > > > > ret = dw_pcie_ep_init(&pci->ep); > > > > > >