From: Thierry Reding <thierry.reding@gmail.com>
To: Zhang Shurong <zhang_shurong@foxmail.com>
Cc: mperttunen@nvidia.com, airlied@gmail.com, daniel@ffwll.ch,
jonathanh@nvidia.com, p.zabel@pengutronix.de,
lgirdwood@gmail.com, broonie@kernel.org,
dri-devel@lists.freedesktop.org, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] drm/tegra: dpaux: Fix PM disable depth imbalance in tegra_dpaux_probe
Date: Thu, 14 Dec 2023 18:27:39 +0100 [thread overview]
Message-ID: <ZXs7C6Yp77UoMCYV@orome.fritz.box> (raw)
In-Reply-To: <tencent_B13DB7F6C0023C46157250A524966F326A09@qq.com>
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On Wed, Oct 04, 2023 at 10:10:55PM +0800, Zhang Shurong wrote:
> The pm_runtime_enable function increases the power disable depth,
> which means that we must perform a matching decrement on the error
> handling path to maintain balance within the given context.
> Additionally, we need to address the same issue for pm_runtime_get_sync.
> We fix this by invoking pm_runtime_disable and pm_runtime_put_sync
> when error returns.
>
> Fixes: 82b81b3ec1a7 ("drm/tegra: dpaux: Implement runtime PM")
> Signed-off-by: Zhang Shurong <zhang_shurong@foxmail.com>
> ---
> drivers/gpu/drm/tegra/dpaux.c | 14 ++++++++++----
> 1 file changed, 10 insertions(+), 4 deletions(-)
Applied, thanks.
Thierry
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prev parent reply other threads:[~2023-12-14 17:27 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-04 14:10 Zhang Shurong
2023-12-14 17:27 ` Thierry Reding [this message]
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