Re: [PATCH] cxl/pci: Fix disabling CXL memory for zero-based addressing

[Robert Richter <rrichter@amd.com>]

On 13.02.24 11:45:48, Dan Williams wrote:
> Robert Richter wrote:
> > On 13.02.24 10:40:07, Dan Williams wrote:
> > > Robert Richter wrote:

> > It would be sane to just not use CXL if assumptions on it are not
> > valid and not to break system to boot.
> 
> I can get on board with that.
> 
> > 
> > > 
> > > > This may take system memory offline and could lead to a kernel hang.
> > > 
> > > Yes, that is not an unreasonable result when Linux fundamental
> > > assumptions are violated.
> > 
> > BUG_ON(fw_table_broken)? If at all, it is not mandatory to have a
> > CFMWS. Btw, the check is more strict and also checks memory
> > attributes. It is very likely something can break.
> 
> Sure, I'll take a patch like this:
> 
> diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c
> index 6c9c8d92f8f7..e4e5a917f1f4 100644
> --- a/drivers/cxl/core/pci.c
> +++ b/drivers/cxl/core/pci.c
> @@ -477,10 +477,11 @@ int cxl_hdm_decode_init(struct cxl_dev_state *cxlds, struct cxl_hdm *cxlhdm,
>                 allowed++;
>         }
>  
> -       if (!allowed) {
> -               cxl_set_mem_enable(cxlds, 0);
> -               info->mem_enabled = 0;
> -       }
> +       WARN_TAINT(!allowed, TAINT_FIRMWARE_WORKAROUND,
> +                  FW_BUG "%s: Range register decodes outside platform defined CXL ranges.",
> +                  dev_name(dev));
> +       if (!allowed)
> +               return -ENXIO;

Would you be ok with that? This aligns with all other -ENXIO kind of
errors where some unexpected firmware or register behavior is
observed.

 	if (!allowed) {
-		cxl_set_mem_enable(cxlds, 0);
-		info->mem_enabled = 0;
+		dev_err(dev, FW_BUG "Range register decodes outside platform defined CXL ranges.\n");
+		return -ENXIO;
 	}


Thanks,

-Robert