From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E3A0112D208; Wed, 6 Mar 2024 13:43:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.17 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709732593; cv=none; b=bQJR28wd7wraaKlAB3y1dBnpfAaF5sfVIeHWQc4OJb5qFsbYBDZPwPRVOP/MrzfhZDE8N05CgXM98XA9rPVkMHNJHQrOras8rdChchHG6eUcNyfNtoENcZB2yKMZYCqiVW9D2weN5io8bLzhXqVeFXX8m1FXHvMkbEh4XtCrrX4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709732593; c=relaxed/simple; bh=Dpzqs+qEHnXZBkM+HHklxhqynUa//LfFylt3W/ZJSLw=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=B4NwWFv1wZRdl5pzfrA4q1derXkKHjr1M+9ZDKtrXw5YJDRiHcCZySR6A5pbiJd+DLpzVjcbovgX+SVqLY0KP9msdAAfT1BHav/gFsqZUlVFpv1qBocwG7w6r+wHjkrFBJ3K+XU/yVEAbndtfBo01Wwg+8idlSe4FUhd6xkaOV0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=lO6/IRrN; arc=none smtp.client-ip=192.198.163.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="lO6/IRrN" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1709732592; x=1741268592; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=Dpzqs+qEHnXZBkM+HHklxhqynUa//LfFylt3W/ZJSLw=; b=lO6/IRrN1I/owSGFBqu7dStThbzAlvDaULQ2cKK3qbaC3LX6HecYOUEI DhtirinkA1SD3C3Pu/MRSNUUceyucPpUYiBwxBu4ZZwsmoB6wWhAF+5+s eIf8gUHik6M0cwy1/FWtdB1Rcn7DmwEsoTXfl0+7qvxuZEHCUibuddci6 qnxcXHpElwsWBI4MnRPAe47QPOaQX121F1DxuLYRfLMbJu9b2dV6THz3E wpwB3BC8ro2jCv89J+8CTmadRqhq/UQ/Nf89qGGHm7Dtaa5zHtLYPdaqu y8C4vwLDPDaJ1q6c4BnT29DRoGoVULHzn0s2Lp5SsOzH0lrk4tqv7tYNU g==; X-IronPort-AV: E=McAfee;i="6600,9927,11004"; a="4208297" X-IronPort-AV: E=Sophos;i="6.06,208,1705392000"; d="scan'208";a="4208297" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 05:43:11 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,11004"; a="914178807" X-IronPort-AV: E=Sophos;i="6.06,208,1705392000"; d="scan'208";a="914178807" Received: from smile.fi.intel.com ([10.237.72.54]) by fmsmga002.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 05:43:07 -0800 Received: from andy by smile.fi.intel.com with local (Exim 4.97) (envelope-from ) id 1rhrY0-0000000AHKB-1gCu; Wed, 06 Mar 2024 15:43:04 +0200 Date: Wed, 6 Mar 2024 15:43:04 +0200 From: Andy Shevchenko To: Yury Norov Cc: Herve Codina , Vadim Fedorenko , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rasmus Villemoes , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, Andrew Lunn , Mark Brown , Christophe Leroy , Thomas Petazzoni Subject: Re: [PATCH v6 4/5] net: wan: fsl_qmc_hdlc: Add runtime timeslots changes support Message-ID: References: <20240306080726.167338-1-herve.codina@bootlin.com> <20240306080726.167338-5-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo On Wed, Mar 06, 2024 at 05:06:12AM -0800, Yury Norov wrote: > On Wed, Mar 06, 2024 at 09:07:20AM +0100, Herve Codina wrote: ... > > + DECLARE_BITMAP(ts_mask_avail, 64); > > + DECLARE_BITMAP(ts_mask, 64); > > + DECLARE_BITMAP(map, 64); > > + bitmap_from_u64(ts_mask_avail, ts_info->rx_ts_mask_avail); > > + bitmap_from_u64(map, slot_map); > We've got a BITMAP_FROM_U64() for this: > > DECLARE_BITMAP(ts_mask_avail, 64) = { BITMAP_FROM_U64(ts_info->rx_ts_mask_avail) }; > DECLARE_BITMAP(map, 64) = { BITMAP_FROM_U64(slot_map) }; This looks ugly. Can we rather provide a macro that does this under the hood? Roughly: #define DEFINE_BITMAP_64(name, src) \ DECLARE_BITMAP(name, 64) = { BITMAP_FROM_U64(src) } -- With Best Regards, Andy Shevchenko