From: Herbert Xu <herbert@gondor.apana.org.au>
To: Chenghai Huang <huangchenghai2@huawei.com>
Cc: davem@davemloft.net, linux-kernel@vger.kernel.org,
linux-crypto@vger.kernel.org, shenyang39@huawei.com,
liulongfang@huawei.com, qianweili@huawei.com
Subject: Re: [PATCH 2/2] crypto: hisilicon/zip - optimize the address offset of the reg query function
Date: Fri, 31 May 2024 17:33:59 +0800 [thread overview]
Message-ID: <ZlmZh5d8RDo3C-HS@gondor.apana.org.au> (raw)
In-Reply-To: <20240506115953.2282155-3-huangchenghai2@huawei.com>
On Mon, May 06, 2024 at 07:59:53PM +0800, Chenghai Huang wrote:
>
> @@ -807,6 +786,18 @@ static int hisi_zip_regs_show(struct seq_file *s, void *unused)
>
> DEFINE_SHOW_ATTRIBUTE(hisi_zip_regs);
>
> +static void __iomem *get_zip_core_addr(struct hisi_qm *qm, int core_num)
> +{
> + u32 zip_comp_core_num = qm->cap_tables.dev_cap_table[ZIP_CLUSTER_COMP_NUM_CAP_IDX].cap_val;
> +
> + if (core_num < zip_comp_core_num)
> + return qm->io_base + HZIP_CORE_DFX_BASE +
> + (core_num + 1) * HZIP_CORE_ADDR_INTRVL;
> +
> + qm->io_base + HZIP_CORE_DFX_DECOMP_BASE +
> + (core_num - zip_comp_core_num) * HZIP_CORE_ADDR_INTRVL;
> +}
> +
This doesn't even build.
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
next prev parent reply other threads:[~2024-05-31 9:34 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-06 11:59 [PATCH 0/2] crypto: hisilicon - adjust vf configuration sequence and optimize zip reg offset Chenghai Huang
2024-05-06 11:59 ` [PATCH 1/2] crypto: hisilicon/qm - adjust the internal processing sequence of the vf enable and disable Chenghai Huang
2024-05-06 11:59 ` [PATCH 2/2] crypto: hisilicon/zip - optimize the address offset of the reg query function Chenghai Huang
2024-05-31 9:33 ` Herbert Xu [this message]
2024-05-31 10:09 ` huangchenghai
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