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Thu, 27 Jun 2024 07:23:30 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA05.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTPS id 45R7NTPI023177 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 27 Jun 2024 07:23:29 GMT Received: from hu-varada-blr.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 27 Jun 2024 00:23:22 -0700 Date: Thu, 27 Jun 2024 12:53:18 +0530 From: Varadarajan Narayanan To: Dmitry Baryshkov CC: , , , , , , , , , , , , , , , , , , , , , , , Subject: Re: [PATCH v3 8/9] soc: qcom: cpr3: Add IPQ9574 definitions Message-ID: References: <20240626104002.420535-1-quic_varada@quicinc.com> <20240626104002.420535-9-quic_varada@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: um9BVXflAiB9fiHUEXGPDtfhOuhGlzp5 X-Proofpoint-ORIG-GUID: um9BVXflAiB9fiHUEXGPDtfhOuhGlzp5 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-27_03,2024-06-25_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 clxscore=1015 mlxscore=0 suspectscore=0 adultscore=0 mlxlogscore=999 impostorscore=0 bulkscore=0 malwarescore=0 spamscore=0 phishscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2406270054 On Wed, Jun 26, 2024 at 09:27:53PM +0300, Dmitry Baryshkov wrote: > On Wed, Jun 26, 2024 at 04:10:01PM GMT, Varadarajan Narayanan wrote: > > From: Praveenkumar I > > > > Add thread, scaling factor, CPR descriptor defines to enable CPR > > on IPQ9574. > > > > Signed-off-by: Praveenkumar I > > Signed-off-by: Varadarajan Narayanan > > --- > > v3: Fix patch author > > Included below information in cover letter > > v2: Fix Signed-off-by order > > Depends: > > [1] https://lore.kernel.org/lkml/20230217-topic-cpr3h-v14-0-9fd23241493d@linaro.org/T/ > > [2] https://github.com/quic-varada/cpr/commits/konrad/ > > --- > > drivers/pmdomain/qcom/cpr3.c | 137 +++++++++++++++++++++++++++++++++++ > > 1 file changed, 137 insertions(+) > > > > diff --git a/drivers/pmdomain/qcom/cpr3.c b/drivers/pmdomain/qcom/cpr3.c > > index c28028be50d8..66c8a4bd9adc 100644 > > --- a/drivers/pmdomain/qcom/cpr3.c > > +++ b/drivers/pmdomain/qcom/cpr3.c > > > + > > +static const struct cpr_desc ipq9574_cpr_desc = { > > + .cpr_type = CTRL_TYPE_CPR4, > > So, is it CPR4 or CPRh? CPR4. > > + .num_threads = 1, > > + .apm_threshold = 850000, > > + .apm_crossover = 880000, > > + .apm_hysteresis = 0, > > + .cpr_base_voltage = 700000, > > + .cpr_max_voltage = 1100000, > > + .timer_delay_us = 5000, > > + .timer_cons_up = 0, > > + .timer_cons_down = 0, > > + .up_threshold = 2, > > + .down_threshold = 2, > > + .idle_clocks = 15, > > + .count_mode = CPR3_CPR_CTL_COUNT_MODE_ALL_AT_ONCE_MIN, > > + .count_repeat = 1, > > + .gcnt_us = 1, > > + .vreg_step_fixed = 12500, > > + .vreg_step_up_limit = 1, > > + .vreg_step_down_limit = 1, > > + .vdd_settle_time_us = 34, > > + .corner_settle_time_us = 6, > > + .reduce_to_corner_uV = true, > > + .hw_closed_loop_en = false, > > + .threads = (const struct cpr_thread_desc *[]) { > > + &ipq9574_thread_silver, > > If it's silver, where is gold or bronze? Will rename this as "ipq9574_thread" Thanks Varada > > + }, > > +}; > > + > > +static const struct cpr_acc_desc ipq9574_cpr_acc_desc = { > > + .cpr_desc = &ipq9574_cpr_desc, > > +}; > > + > > static const int sdm630_gold_scaling_factor[][CPR3_RO_COUNT] = { > > /* Same RO factors for all fuse corners */ > > { > > @@ -2828,6 +2964,7 @@ static void cpr_remove(struct platform_device *pdev) > > } > > > > static const struct of_device_id cpr3_match_table[] = { > > + { .compatible = "qcom,ipq9574-cprh", .data = &ipq9574_cpr_acc_desc }, > > { .compatible = "qcom,msm8998-cprh", .data = &msm8998_cpr_acc_desc }, > > { .compatible = "qcom,sdm630-cprh", .data = &sdm630_cpr_acc_desc }, > > { } > > -- > > 2.34.1 > > > > -- > With best wishes > Dmitry