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Tue, 23 Jul 2024 14:49:18 +0000 Date: Tue, 23 Jul 2024 22:49:08 +0800 From: Chao Gao To: Sean Christopherson CC: Paolo Bonzini , , , Zeng Guang Subject: Re: [PATCH 6/6] KVM: nVMX: Detect nested posted interrupt NV at nested VM-Exit injection Message-ID: References: <20240720000138.3027780-1-seanjc@google.com> <20240720000138.3027780-7-seanjc@google.com> Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20240720000138.3027780-7-seanjc@google.com> X-ClientProxiedBy: SG3P274CA0007.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:be::19) To CH3PR11MB8660.namprd11.prod.outlook.com (2603:10b6:610:1ce::13) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH3PR11MB8660:EE_|CY8PR11MB7011:EE_ X-MS-Office365-Filtering-Correlation-Id: e7c20dda-ddc9-4eca-93b7-08dcab26a148 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|1800799024|376014; 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If the "process > posted interrupts" VM-execution control is also 1, this behavior is > changed and the processor handles an external interrupt as follows: > > 1. The local APIC is acknowledged; this provides the processor core > with an interrupt vector, called here the physical vector. > 2. If the physical vector equals the posted-interrupt notification > vector, the logical processor continues to the next step. Otherwise, > a VM exit occurs as it would normally due to an external interrupt; > the vector is saved in the VM-exit interruption-information field. > >For the most part, KVM has avoided problems because a PI NV for L2 that >arrives will L2 is active will be processed by hardware, and KVM checks >for a pending notification vector during nested VM-Enter. With this series in place, I wonder if we can remove the check for a pending notification vector during nested VM-Enter. /* Emulate processing of posted interrupts on VM-Enter. */ if (nested_cpu_has_posted_intr(vmcs12) && kvm_apic_has_interrupt(vcpu) == vmx->nested.posted_intr_nv) { vmx->nested.pi_pending = true; kvm_make_request(KVM_REQ_EVENT, vcpu); kvm_apic_clear_irr(vcpu, vmx->nested.posted_intr_nv); } I believe the check is arguably incorrect because: 1. nested_vmx_run() may set pi_pending and clear the IRR bit of the notification vector, but this doesn't guarantee that vmx_complete_nested_posted_interrupt() will be called later in vmx_check_nested_events(). This could lead to partial posted interrupt processing, where the IRR bit is cleared but PIR isn't copied into VIRR. This might confuse L1 since, from L1's perspective, posted interrupt processing should be atomic. Per the SDM, the logical processor performs posted-interrupt processing "in an uninterruptible manner". 2. The check doesn't respect event priority. For example, if a higher-priority event (preemption timer exit or NMI-window exit) causes an immediate nested VM-exit, the notification vector should remain pending after the nested VM-exit.