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Thu, 29 Aug 2024 01:23:03 +0000 (GMT) Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 47T1N20D010087 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 29 Aug 2024 01:23:02 GMT Received: from jiegan-gv.ap.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 28 Aug 2024 18:22:56 -0700 Date: Thu, 29 Aug 2024 09:22:52 +0800 From: JieGan To: Rob Herring CC: Suzuki K Poulose , Mike Leach , James Clark , "Alexander Shishkin" , Maxime Coquelin , Alexandre Torgue , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Jinlong Mao , , , , , Tingwei Zhang , Yuanfang Zhang , "Tao Zhang" , Song Chai , , Subject: Re: [PATCH v4 3/5] dt-bindings: arm: Add Coresight TMC Control Unit hardware Message-ID: References: <20240828012706.543605-1-quic_jiegan@quicinc.com> <20240828012706.543605-4-quic_jiegan@quicinc.com> <20240828151205.GA3830921-robh@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20240828151205.GA3830921-robh@kernel.org> X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: D4C0V4ke46dMwbAUNV4rApxcOX-kJj4m X-Proofpoint-GUID: D4C0V4ke46dMwbAUNV4rApxcOX-kJj4m X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-08-28_10,2024-08-28_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 mlxlogscore=999 suspectscore=0 phishscore=0 spamscore=0 bulkscore=0 clxscore=1011 mlxscore=0 malwarescore=0 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2408290009 On Wed, Aug 28, 2024 at 10:12:05AM -0500, Rob Herring wrote: > On Wed, Aug 28, 2024 at 09:27:04AM +0800, Jie Gan wrote: > > Add binding file to specify how to define a Coresight TMC > > Control Unit device in device tree. > > > > It is responsible for controlling the data filter function > > based on the source device's Trace ID for TMC ETR device. > > The trace data with that Trace id can get into ETR's buffer > > while other trace data gets ignored. > > > > Signed-off-by: Jie Gan > > --- > > .../bindings/arm/qcom,coresight-ctcu.yaml | 84 +++++++++++++++++++ > > 1 file changed, 84 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml > > > > diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml > > new file mode 100644 > > index 000000000000..669aac646451 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml > > @@ -0,0 +1,84 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/arm/qcom,coresight-ctcu.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: CoreSight TMC Control Unit > > + > > +maintainers: > > + - Yuanfang Zhang > > + - Mao Jinlong > > + - Jie Gan > > + > > +description: > > You need '>' or '|' if you want to preserve paragraphs. Sorry for the mistake, I did not observe it by self-checking. I will add it in next version. description: -> description: | > > > + The Trace Memory Controller(TMC) is used for Embedded Trace Buffer(ETB), > > + Embedded Trace FIFO(ETF) and Embedded Trace Router(ETR) configurations. > > + The configuration mode (ETB, ETF, ETR) is discovered at boot time when > > + the device is probed. > > + > > + The Coresight TMC Control unit controls various Coresight behaviors. > > + It works as a helper device when connected to TMC ETR device. > > + It is responsible for controlling the data filter function based on > > + the source device's Trace ID for TMC ETR device. The trace data with > > + that Trace id can get into ETR's buffer while other trace data gets > > + ignored. > > + > > +properties: > > + compatible: > > + enum: > > + - qcom,sa8775p-ctcu > > + > > + reg: > > + maxItems: 1 > > + > > + clocks: > > + maxItems: 1 > > + > > + clock-names: > > + items: > > + - const: apb > > + > > + in-ports: > > Just "ports". "in-ports" is for the case when you have "out-ports". We had a discusstion about why use "in-ports" in v3. https://lore.kernel.org/linux-arm-kernel/4b51d5a9-3706-4630-83c1-01b01354d9a4@arm.com/ The individual driver must "fix" before use "ports". The question is do we need to fix the logic of the individual driver before submit this patch? > > > -- > > 2.34.1 > > Thanks, Jie