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Mon, 07 Oct 2024 09:06:56 -0700 (PDT) Received: from hoboy.vegasvil.org ([198.59.164.146]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-20c138afd1dsm41264245ad.36.2024.10.07.09.06.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Oct 2024 09:06:56 -0700 (PDT) Date: Mon, 7 Oct 2024 09:06:54 -0700 From: Richard Cochran To: Arkadiusz Kubalewski Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, intel-wired-lan@lists.osuosl.org, anthony.l.nguyen@intel.com, przemyslaw.kitszel@intel.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com Subject: Re: [RFC PATCH 0/2] ptp: add control over HW timestamp latch point Message-ID: References: <20241003213754.926691-1-arkadiusz.kubalewski@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20241003213754.926691-1-arkadiusz.kubalewski@intel.com> On Thu, Oct 03, 2024 at 11:37:52PM +0200, Arkadiusz Kubalewski wrote: > HW support of PTP/timesync solutions in network PHY chips can be > achieved with two different approaches, the timestamp maybe latched > either in the beginning or after the Start of Frame Delimiter (SFD) [1]. > > Allow ptp device drivers to provide user with control over the timestamp > latch point. This looks okay to me. Sorry for the late reply, but I'm travelling untill Oct 11 and may not response to messages right away. Thanks, Richard