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Received: from PAXPR04MB9642.eurprd04.prod.outlook.com (2603:10a6:102:240::14) by VI0PR04MB10419.eurprd04.prod.outlook.com (2603:10a6:800:235::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8158.17; Fri, 15 Nov 2024 15:05:55 +0000 Received: from PAXPR04MB9642.eurprd04.prod.outlook.com ([fe80::9126:a61e:341d:4b06]) by PAXPR04MB9642.eurprd04.prod.outlook.com ([fe80::9126:a61e:341d:4b06%4]) with mapi id 15.20.8158.017; Fri, 15 Nov 2024 15:05:55 +0000 Date: Fri, 15 Nov 2024 10:05:44 -0500 From: Frank Li To: Richard Zhu Cc: jingoohan1@gmail.com, bhelgaas@google.com, lpieralisi@kernel.org, kw@linux.com, manivannan.sadhasivam@linaro.org, robh@kernel.org, imx@lists.linux.dev, kernel@pengutronix.de, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2] PCI: dwc: Clean up some unnecessary codes in dw_pcie_suspend_noirq() Message-ID: References: <20241115090321.527694-1-hongxing.zhu@nxp.com> Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?Qh3wwMG2+YGI/qc8CsoBam2Pyq9vhH1la1xzu25d8hy87ACNoNpoYZ7enIiV?= =?us-ascii?Q?XIWLkEzPJXT5C6wsEjkgAseKE/AOqb1LFgKlc1LndSmjbkBBT2ehCFCwrIZB?= =?us-ascii?Q?GJYnI1dY7KWFU+tDjxtPUE6O4+QGDWywKnx3IaFtzwXDVcPgsamHj2U3H7t3?= =?us-ascii?Q?biOTxVycaD5NSwZffOo7/Ligsx8R4t6gr4dxT60qLhyz2ZAJeDmDHoRipBJm?= =?us-ascii?Q?l0TP5f0Qm6LZBGVqWjeFDht3YMgjDIXSQV9DzgnrkXAg7c401l7M/yQK6LOa?= =?us-ascii?Q?6bA5bfszTj3hRbOTxk/kpfXZo41nbCxeRAahO8/HCZo02E8OjmTtg/ZutMR/?= =?us-ascii?Q?TjNXWhJDHGwYNxU6OOZATioRamvEbyhGHVtz0fBPZOR9BxrJkUqhY0sVNhVM?= =?us-ascii?Q?qeAQ1sLKaZRocAIstQjp+JBybhl1z5ryaeVV32LoVFK7FCmsVurzEBWESChq?= =?us-ascii?Q?dfDkbwUIeWM0gx7Q/GxMtTVMVVazKu9c+TBQyeUZpA3ssGfa/iYDZMoHR4VO?= =?us-ascii?Q?6G7MhT0SBhhvbxwqO0OUL16reuzQKPdcdzlE4h+co0+oISkinCqIQ7oTrfbq?= =?us-ascii?Q?XgwOfLOd3fdpRBI9ivIjjdfy79GeEUVZVLYZoKup5O1SP5/nx+4H4KmpxjV1?= =?us-ascii?Q?5bF0Vs8VayrwL/zYBmgQahGdEa9bUJXTBfClQ5mQfaLB1L7qZF7wwHrbAptG?= =?us-ascii?Q?A9vTsnc8KJu7G6QECN4RNLg5AXLRhuwE5SHRwm8IpluUtP+x9iPeI2rMslXi?= =?us-ascii?Q?mWLTUPDMKnGrY1gdBpJgmKvpVJWeJ7U5pBJSu8Xe7JDYk8QQyI20WKZ7LP5Q?= =?us-ascii?Q?PNxcz1d+0NpNKjiSenDZAK29gRUm9YGHDRD+zcBGeZRJw49sObiPba57pWOu?= =?us-ascii?Q?ut1bFwk6uk+7xQbvE98d5cbyHGACoQsMj16ojKTrwRFo7qc6PKJKmRnxqIdK?= =?us-ascii?Q?OGrpZIhnh+TtaoDBVOl4qH4BOBy+ax07JnszuyDe7muQcPm6ZS9zsI/6VIjV?= =?us-ascii?Q?QII4I7ORUF5sVyMCmLCROV5GYRk03VdKyZwCFlKo0I4iI8xzNgE3+KdAVM1r?= =?us-ascii?Q?rF0dIuxUuDIqpxeRcewriMJwl2eFdc/KLPoOoQw0IcIy1sePNZzURWHe7c4B?= =?us-ascii?Q?Yqg/zoGnZ6lLo6UqMQp8JO4I/O5EI2z3923cpPdqMwtoPASObi4w80UGQsJ7?= =?us-ascii?Q?N96oTEqOg83x+rIUmUFpx0/KYcDuG5s2YT/nVYjvPBdm6UtkQDGitMCTlwAB?= =?us-ascii?Q?6aqh4WBmVUbz2vYvXZMQTE+pN4urCmmfRvOfjM0UN5Tf8buyzYl33pUnE/3z?= =?us-ascii?Q?j/w+MH9OkA49iaOZcuiUil/EPBjVk1D5L/hvUFZfuAQaZHnNClo0Kegn9rkW?= =?us-ascii?Q?0KQi36QPKnEDFkcLzFtFhxxft38AVBqlB+pcEuJCCA5SxUgvPy199h0o0zQV?= =?us-ascii?Q?YBS1gsCESAUmI3vjNnOJXJtp9W5eNuPdNPbdp4X/TUPV1an4zlBS1Mx4K1b+?= =?us-ascii?Q?+4TLmiWzp3rIwby8O0sHa6qt1+Y21pxaKgoISQVmZLGvYzpMpkd5K4M7PF3+?= =?us-ascii?Q?PUs+yIc14iyVy9aIFjwMyvhtGLI+p3eKnO2hB0iz?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 9c28f146-cc56-4d6b-7350-08dd058700fb X-MS-Exchange-CrossTenant-AuthSource: PAXPR04MB9642.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Nov 2024 15:05:55.3436 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: iC4eaaCZzDrNgRBEf45opFj+fJnz+5TtFyenYowryKI3lbO3r2aUEWbdb7V6LxdQZ3J8oeAMt2da3zaTxk08eQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI0PR04MB10419 On Fri, Nov 15, 2024 at 05:03:21PM +0800, Richard Zhu wrote: > Before sending PME_TURN_OFF, don't test the LTSSM stat. Since it's safe > to send PME_TURN_OFF message regardless of whether the link is up or > down. So, there would be no need to test the LTSSM stat before sending > PME_TURN_OFF message. > > Only dump the message when ltssm_stat is not in DETECT and POLL. > In the other words, there isn't a notification when no endpoint is > connected at all. > > When the endpoint is connected and after PME_TURN_OFF is issued. Just > print out one information instead of an error and exit, if the link > doesn't entry DW_PCIE_LTSSM_L2_IDLE stat. Since the recovery would be > done in the following closely dw_pcie_resume_noirq(). > > Signed-off-by: Richard Zhu > --- > .../pci/controller/dwc/pcie-designware-host.c | 37 ++++++++++--------- > drivers/pci/controller/dwc/pcie-designware.h | 1 + > 2 files changed, 21 insertions(+), 17 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c > index f7ceeb785fb0..c2053555c44b 100644 > --- a/drivers/pci/controller/dwc/pcie-designware-host.c > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c > @@ -927,23 +927,26 @@ int dw_pcie_suspend_noirq(struct dw_pcie *pci) > if (dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKCTL) & PCI_EXP_LNKCTL_ASPM_L1) > return 0; > > - if (dw_pcie_get_ltssm(pci) > DW_PCIE_LTSSM_DETECT_ACT) { > - /* Only send out PME_TURN_OFF when PCIE link is up */ > - if (pci->pp.ops->pme_turn_off) > - pci->pp.ops->pme_turn_off(&pci->pp); > - else > - ret = dw_pcie_pme_turn_off(pci); > - > - if (ret) > - return ret; > + if (pci->pp.ops->pme_turn_off) > + pci->pp.ops->pme_turn_off(&pci->pp); > + else > + ret = dw_pcie_pme_turn_off(pci); > + if (ret) > + return ret; > > - ret = read_poll_timeout(dw_pcie_get_ltssm, val, val == DW_PCIE_LTSSM_L2_IDLE, > - PCIE_PME_TO_L2_TIMEOUT_US/10, > - PCIE_PME_TO_L2_TIMEOUT_US, false, pci); > - if (ret) { > - dev_err(pci->dev, "Timeout waiting for L2 entry! LTSSM: 0x%x\n", val); > - return ret; > - } > + ret = read_poll_timeout(dw_pcie_get_ltssm, val, val == DW_PCIE_LTSSM_L2_IDLE, val == DW_PCIE_LTSSM_L2_IDLE || val <= DW_PCIE_LTSSM_DETECT_WAIT it will avoid wait 10ms when no link up > + PCIE_PME_TO_L2_TIMEOUT_US/10, > + PCIE_PME_TO_L2_TIMEOUT_US, false, pci); > + if (ret && (val > DW_PCIE_LTSSM_DETECT_WAIT)) > + /* Only dump message when ltssm_stat isn't in DETECT and POLL */ > + dev_info(pci->dev, "Timeout waiting for L2 entry! LTSSM: 0x%x\n", val); > + else > + /* > + * Refer to r6.0, sec 5.3.3.2.1, software should wait at least > + * 100ns after L2/L3 Ready before turning off refclock and > + * main power. It's harmless too when no endpoint connected. > + */ > + udelay(1); > } > > dw_pcie_stop_link(pci); > @@ -952,7 +955,7 @@ int dw_pcie_suspend_noirq(struct dw_pcie *pci) > > pci->suspended = true; > > - return ret; > + return 0; > } > EXPORT_SYMBOL_GPL(dw_pcie_suspend_noirq); > > diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h > index 347ab74ac35a..bf036e66717e 100644 > --- a/drivers/pci/controller/dwc/pcie-designware.h > +++ b/drivers/pci/controller/dwc/pcie-designware.h > @@ -330,6 +330,7 @@ enum dw_pcie_ltssm { > /* Need to align with PCIE_PORT_DEBUG0 bits 0:5 */ > DW_PCIE_LTSSM_DETECT_QUIET = 0x0, > DW_PCIE_LTSSM_DETECT_ACT = 0x1, > + DW_PCIE_LTSSM_DETECT_WAIT = 0x6, > DW_PCIE_LTSSM_L0 = 0x11, > DW_PCIE_LTSSM_L2_IDLE = 0x15, > > -- > 2.37.1 >