From: Michal Simek <monstr@monstr.eu>
To: Manish Narani <manish.narani@xilinx.com>,
robh+dt@kernel.org, mark.rutland@arm.com,
michal.simek@xilinx.com, arnd@arndb.de,
horms+renesas@verge.net.au, khilman@baylibre.com
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, git@xilinx.com
Subject: Re: [PATCH v3] arm64: zynqmp: Add ZynqMP SDHCI compatible string
Date: Thu, 21 Nov 2019 09:34:35 +0100 [thread overview]
Message-ID: <a0033b99-c58e-deb1-9313-f079c74775ae@monstr.eu> (raw)
In-Reply-To: <1571297331-99924-1-git-send-email-manish.narani@xilinx.com>
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On 17. 10. 19 9:28, Manish Narani wrote:
> Add the new compatible string for ZynqMP SD Host Controller for its use
> in the Arasan SDHCI driver for some of the ZynqMP specific operations.
> Add required properties for the same.
>
> Signed-off-by: Manish Narani <manish.narani@xilinx.com>
> ---
> This patch depends on the below series of patches:
> https://lkml.org/lkml/2019/10/17/37
>
> Changes in v2:
> - Added clock-names for SD card clocks for getting clocks in the driver
>
> Changes in v3:
> - Reverted "Added clock-names for SD card clocks for getting clocks in the driver"
> ---
> arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index 9aa67340a4d8..c7b8c3c28aa7 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -494,20 +494,26 @@
>
> sdhci0: mmc@ff160000 {
> compatible = "arasan,sdhci-8.9a";
> + compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
> status = "disabled";
> interrupt-parent = <&gic>;
> interrupts = <0 48 4>;
> reg = <0x0 0xff160000 0x0 0x1000>;
> clock-names = "clk_xin", "clk_ahb";
> + #clock-cells = <1>;
> + clock-output-names = "clk_out_sd0", "clk_in_sd0";
> };
>
> sdhci1: mmc@ff170000 {
> compatible = "arasan,sdhci-8.9a";
> + compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
> status = "disabled";
> interrupt-parent = <&gic>;
> interrupts = <0 49 4>;
> reg = <0x0 0xff170000 0x0 0x1000>;
> clock-names = "clk_xin", "clk_ahb";
> + #clock-cells = <1>;
> + clock-output-names = "clk_out_sd1", "clk_in_sd1";
> };
>
> smmu: smmu@fd800000 {
>
Patches have been applied
https://lkml.org/lkml/2019/11/20/366
That's why I have applied this one to my tree.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
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next prev parent reply other threads:[~2019-11-21 8:34 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-17 7:28 Manish Narani
2019-11-21 8:34 ` Michal Simek [this message]
2019-11-21 8:40 ` Michal Simek
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