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Wed, 03 Jun 2026 00:03:25 -0700 (PDT) X-Received: by 2002:a05:6a00:2351:b0:839:9053:9a16 with SMTP id d2e1a72fcca58-84284f936e9mr2207789b3a.47.1780470204929; Wed, 03 Jun 2026 00:03:24 -0700 (PDT) Received: from [10.217.216.18] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-8428706fa9asm1260427b3a.45.2026.06.03.00.03.21 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 03 Jun 2026 00:03:24 -0700 (PDT) Message-ID: Date: Wed, 3 Jun 2026 12:33:20 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Ram Prakash Gupta Subject: Re: [PATCH v1 1/1] mmc: sdhci-msm: Set ice clk rate To: Adrian Hunter , Ulf Hansson , konrad.dybcio@oss.qualcomm.com, abhinaba.rakshit@oss.qualcomm.com Cc: linux-mmc@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, pradeep.pragallapati@oss.qualcomm.com, manivannan.sadhasivam@oss.qualcomm.com References: <20260529081045.2877910-1-ram.gupta@oss.qualcomm.com> <20260529081045.2877910-2-ram.gupta@oss.qualcomm.com> <18af0dcb-8cf1-4565-a90d-58bf1e66811f@intel.com> Content-Language: en-US In-Reply-To: <18af0dcb-8cf1-4565-a90d-58bf1e66811f@intel.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: 0zNeEJrogePwu2oJYyRWVx7sSoLpCZiV X-Authority-Analysis: v=2.4 cv=PNE/P/qC c=1 sm=1 tr=0 ts=6a1fd1be cx=c_pps a=rz3CxIlbcmazkYymdCej/Q==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=VwQbUJbxAAAA:8 a=KKAkSRfTAAAA:8 a=EUspDBNiAAAA:8 a=6wBK2Req9ijoumtyTN8A:9 a=QEXdDO2ut3YA:10 a=bFCP_H2QrGi7Okbo017w:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-GUID: 0zNeEJrogePwu2oJYyRWVx7sSoLpCZiV X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjAzMDA2NSBTYWx0ZWRfX7f61yhCtGZWi vFbP9csshZYSozoHmBI5PXhyg7NA2MR24tGld43T28pQCwVTVrRU7RmkCDPBHiUQv25weJLgOFD b47MVpCex0gnGtGYmTy+0CjCwO56mr+ZzboiflOVedvoDbXDm7LOBQ+GKKK15BJsdokvmL9I9WE vuR/YeUsGDGhK81xHzANMcUzAAqIlLv3brgAdICtkyFSdVoJT2VZe8jYTvjfelrfE5j3fr2uOc3 7rIL/ajuZsTZLHZsosGxPNNmXDlZUb7x9iHxyigK4MLNLZhSgtgd4TJKWOyokjkLMmrtc7+LbVI 7jvtc0EI/c0wCvsrIVaeKLuU4lD/WFeiFr9WpBmpkYyVIZrdpbpr62B/wbJ9QST5KWAkdiBFvgA EXwkrmJzkFzyiEZ3ZoccswN3rWs7F0ZPAma3sK9eZ/1SG849jg7MWUo9MNinLPL2+MU/JbwXPYA k15SlMzm0Zv0iPpNEBg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-03_02,2026-05-28_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 bulkscore=0 clxscore=1015 malwarescore=0 spamscore=0 adultscore=0 impostorscore=0 suspectscore=0 priorityscore=1501 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2606030065 On 6/1/2026 1:00 PM, Adrian Hunter wrote: > On 29/05/2026 11:10, Ram Prakash Gupta wrote: >> Set ice clk rate from sdhci msm platform driver, needed for >> target which are having legacy ice support, and need sdhci msm >> platform driver to set rate. > > Please expand upon what "legacy" means here? > for devices where ice node is not created as separate device node those are referred here as legacy, separate device node for ice starts with below change: https://lore.kernel.org/all/20230407105029.2274111-1-abel.vesa@linaro.org/ also I will update legacy that ice nodes which are created withing mmc dt node, so that ambiguity about legacy is clear. > For CQ case, qcom_ice_create() prefers "ice_core_clk" before > "ice". How does that relate to this? Please clarify that in the > commit message also. > "ice" is the naming convention used for emmc ice core clk in dt and "ice_core_clk" is the naming convention for ufs ice core clk. In the function you referred, since ice driver is common for both storage media, it tries to parse both the clock. Here we are handling "ice" as this is needed for emmc only. I will add the same in commit message. >> >> Signed-off-by: Ram Prakash Gupta >> --- >> drivers/mmc/host/sdhci-msm.c | 12 ++++++++++++ >> 1 file changed, 12 insertions(+) >> >> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c >> index b4131b12df56..c6a073718aa4 100644 >> --- a/drivers/mmc/host/sdhci-msm.c >> +++ b/drivers/mmc/host/sdhci-msm.c >> @@ -286,6 +286,7 @@ struct sdhci_msm_host { >> /* core, iface, cal and sleep clocks */ >> struct clk_bulk_data bulk_clks[4]; >> #ifdef CONFIG_MMC_CRYPTO >> + struct clk *ice_clk; /* ICE clock */ > > Why keep ice_clk? > here we need this ice_clk because rate set is required only when ice clk is added with emmc node in dt, and in case we try to use the clk entry of qcom_ice structure it will set the rate for new ice node as well which is separate. but also we can avoid this, since this one time operation, and we can reuse local variable clk inside sdhci_msm_probe, so it wont be needed. I will remove this in next patchset. >> struct qcom_ice *ice; >> #endif >> unsigned long clk_rate; >> @@ -2708,6 +2709,17 @@ static int sdhci_msm_probe(struct platform_device *pdev) >> return ret; >> } >> >> +#ifdef CONFIG_MMC_CRYPTO >> + /* Setup ICE clock */ >> + msm_host->ice_clk = devm_clk_get(&pdev->dev, "ice"); >> + if (!IS_ERR(msm_host->ice_clk)) { > > Does not attempt to deal with -EPROBE_DEFER, although bus_clk above > doesn't either. > here need is just to set the rate, rest of the enablement part would be taken care in ice driver, hence we can avoid this handling here. >> + /* Vote for max. clk rate for max. performance */ >> + ret = clk_set_rate(msm_host->ice_clk, INT_MAX); >> + if (ret) >> + dev_err(&pdev->dev, "ice clk set rate failed (%d)\n", ret); >> + } >> +#endif > > Could put this in a helper+stub function in the "Inline Crypto Engine > (ICE) support" section, to save having #ifdef CONFIG_MMC_CRYPTO here > sure, will take care of this in next patchset. >> + >> /* Setup main peripheral bus clock */ >> clk = devm_clk_get(&pdev->dev, "iface"); >> if (IS_ERR(clk)) { >