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Tue, 22 Aug 2023 04:53:59 GMT Received: from hu-pkondeti-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.36; Mon, 21 Aug 2023 21:53:51 -0700 Date: Tue, 22 Aug 2023 10:23:48 +0530 From: Pavan Kondeti To: Krishna Chaitanya Chundru CC: Pavan Kondeti , , , , , , , , , , , , Andy Gross , "Bjorn Andersson" , Konrad Dybcio , Manivannan Sadhasivam , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Viresh Kumar , Nishanth Menon , Stephen Boyd , Subject: Re: [PATCH v3 3/3] PCI: qcom: Add OPP support for speed based performance state of RPMH Message-ID: References: <1692627343-4380-1-git-send-email-quic_krichai@quicinc.com> <1692627343-4380-4-git-send-email-quic_krichai@quicinc.com> <95078a8b-857d-4900-8737-a495212db935@quicinc.com> <162b135d-7e27-bf3b-df8f-45e2a5e73897@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <162b135d-7e27-bf3b-df8f-45e2a5e73897@quicinc.com> X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: C3fxsfgQuSMU2ac_LgQk342vUF_KY1EZ X-Proofpoint-ORIG-GUID: C3fxsfgQuSMU2ac_LgQk342vUF_KY1EZ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.601,FMLib:17.11.176.26 definitions=2023-08-22_02,2023-08-18_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1011 lowpriorityscore=0 priorityscore=1501 adultscore=0 mlxlogscore=999 bulkscore=0 suspectscore=0 spamscore=0 mlxscore=0 phishscore=0 impostorscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2306200000 definitions=main-2308220039 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org +linux-pm and OPP maintainers On Tue, Aug 22, 2023 at 09:57:41AM +0530, Krishna Chaitanya Chundru wrote: > > On 8/22/2023 9:33 AM, Pavan Kondeti wrote: > > On Mon, Aug 21, 2023 at 07:45:43PM +0530, Krishna chaitanya chundru wrote: > > > Before link training vote for the maximum performance state of RPMH > > > and once link is up, vote for the performance state based upon the link > > > speed. > > > > > > Signed-off-by: Krishna chaitanya chundru > > > --- > > > drivers/pci/controller/dwc/pcie-qcom.c | 47 ++++++++++++++++++++++++++++++++++ > > > 1 file changed, 47 insertions(+) > > > > > > diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c > > > index 7a87a47..c57ca1a 100644 > > > --- a/drivers/pci/controller/dwc/pcie-qcom.c > > > +++ b/drivers/pci/controller/dwc/pcie-qcom.c > > > @@ -22,6 +22,7 @@ > > > #include > > > #include > > > #include > > > +#include > > > #include > > > #include > > > #include > > > @@ -1357,6 +1358,32 @@ static int qcom_pcie_icc_init(struct qcom_pcie *pcie) > > > return 0; > > > } > > > +static void qcom_pcie_opp_update(struct qcom_pcie *pcie) > > > +{ > > > + struct dw_pcie *pci = pcie->pci; > > > + struct dev_pm_opp *opp; > > > + u32 offset, status; > > > + int speed, ret = 0; > > > + > > > + offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP); > > > + status = readw(pci->dbi_base + offset + PCI_EXP_LNKSTA); > > > + > > > + /* Only update constraints if link is up. */ > > > + if (!(status & PCI_EXP_LNKSTA_DLLLA)) > > > + return; > > > + > > What happens if link is not up during probe? We set max vote before > > this, should not we bring it down in suspend and vote it back again in > > resume? > > ok, I will set to lower value in the suspend path if the link is not up.  If > the link is already up driver will not > > do any modifications. > > > > > > + speed = FIELD_GET(PCI_EXP_LNKSTA_CLS, status); > > > + > > > + opp = dev_pm_opp_find_level_exact(pci->dev, speed); > > > + if (!IS_ERR(opp)) { > > > + ret = dev_pm_opp_set_opp(pci->dev, opp); > > > + if (ret) > > > + dev_err(pci->dev, "Failed to set opp: %d\n", ret); > > > + dev_pm_opp_put(opp); > > > + } > > Since you added an error message, make it more useful by printing the > > opp level also. dev_pm_opp_get_level(). > Sure I will add this in next patch. > > > > > + > > > +} > > > + > > > static void qcom_pcie_icc_update(struct qcom_pcie *pcie) > > > { > > > struct dw_pcie *pci = pcie->pci; > > > @@ -1439,8 +1466,10 @@ static void qcom_pcie_init_debugfs(struct qcom_pcie *pcie) > > > static int qcom_pcie_probe(struct platform_device *pdev) > > > { > > > const struct qcom_pcie_cfg *pcie_cfg; > > > + unsigned long max_freq = INT_MAX; > > > struct device *dev = &pdev->dev; > > > struct qcom_pcie *pcie; > > > + struct dev_pm_opp *opp; > > > struct dw_pcie_rp *pp; > > > struct resource *res; > > > struct dw_pcie *pci; > > > @@ -1511,6 +1540,22 @@ static int qcom_pcie_probe(struct platform_device *pdev) > > > if (ret) > > > goto err_pm_runtime_put; > > > + /* OPP table is optional */ > > > + ret = devm_pm_opp_of_add_table(dev); > > > + if (ret && ret != -ENODEV) { > > > + dev_err(dev, "Invalid OPP table in Device tree\n"); > > > + goto err_pm_runtime_put; > > > + } > > > + > > > + /* vote for max level in the opp table */ > > > + opp = dev_pm_opp_find_freq_floor(dev, &max_freq); > > > + if (!IS_ERR(opp)) { > > > + ret = dev_pm_opp_set_opp(dev, opp); > > > + if (ret) > > > + dev_err(pci->dev, "Failed to set opp: %d\n", ret); > > > + dev_pm_opp_put(opp); > > > + } > > > + > > This needs an update since you moved from frequency based voting to link > > speed based voting. > > dev_pm_opp_find_freq_floor will give us the max the opp level opp we don't > have a similar API to get max opp-level > > For that reason we are using this API. > Ok, thanks. I get that it is working. Would you be not knowing the exact level for the max speed supported? if that is unknown, I believe we have a use case for dev_pm_opp_find_level_floor() API. Adding the best people on this matter for thei valuable opinion/suggestions. Thanks, Pavan