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([2001:b07:6468:f312:c8dd:75d4:99ab:290a]) by smtp.googlemail.com with ESMTPSA id g20sm37931ejk.209.2022.02.24.06.58.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 24 Feb 2022 06:58:52 -0800 (PST) Message-ID: Date: Thu, 24 Feb 2022 15:58:50 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Subject: Re: [PATCH 00/11] KVM: x86: Prep work for VMX IPI virtualization Content-Language: en-US To: Sean Christopherson Cc: Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Zeng Guang , Chao Gao , Maxim Levitsky References: <20220204214205.3306634-1-seanjc@google.com> From: Paolo Bonzini In-Reply-To: <20220204214205.3306634-1-seanjc@google.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2/4/22 22:41, Sean Christopherson wrote: > Prepare for VMX's IPI virtualization, in which hardware treats ICR as a > single 64-bit register in x2APIC mode. The SDM wasn't clear on how ICR > should be modeled, KVM just took the easier path and guessed wrong. > > Hardware's implementation of ICR as a 64-bit register requires explicit > handling to maintain backwards compatibility in KVM_{G,S}ET_REG, as > migrating a VM between hosts with different IPI virtualization support > would lead to ICR "corruption" for writes that aren't intercepted by > KVM (hardware doesn't fill ICR2 in vAPIC page). > > This series includes AVIC cleanups for things I encountered along the way. > AVIC still has multiple issues, this only fixes the easy bugs. > > Sean Christopherson (11): > Revert "svm: Add warning message for AVIC IPI invalid target" > KVM: VMX: Handle APIC-write offset wrangling in VMX code > KVM: x86: Use "raw" APIC register read for handling APIC-write VM-Exit > KVM: SVM: Use common kvm_apic_write_nodecode() for AVIC write traps > KVM: SVM: Don't rewrite guest ICR on AVIC IPI virtualization failure > KVM: x86: WARN if KVM emulates an IPI without clearing the BUSY flag > KVM: x86: Make kvm_lapic_reg_{read,write}() static > KVM: x86: Add helpers to handle 64-bit APIC MSR read/writes > KVM: x86: Treat x2APIC's ICR as a 64-bit register, not two 32-bit regs > KVM: x86: Make kvm_lapic_set_reg() a "private" xAPIC helper > KVM: selftests: Add test to verify KVM handles x2APIC ICR=>ICR2 dance > > arch/x86/kvm/lapic.c | 193 ++++++++++++------ > arch/x86/kvm/lapic.h | 21 +- > arch/x86/kvm/svm/avic.c | 38 ++-- > arch/x86/kvm/trace.h | 6 +- > arch/x86/kvm/vmx/vmx.c | 11 +- > arch/x86/kvm/x86.c | 15 +- > tools/testing/selftests/kvm/.gitignore | 1 + > tools/testing/selftests/kvm/Makefile | 1 + > .../selftests/kvm/include/x86_64/apic.h | 1 + > .../selftests/kvm/x86_64/xapic_state_test.c | 150 ++++++++++++++ > 10 files changed, 325 insertions(+), 112 deletions(-) > create mode 100644 tools/testing/selftests/kvm/x86_64/xapic_state_test.c > > > base-commit: 17179d0068b20413de2355f84c75a93740257e20 Queued, with patch 4 adjusted. Thanks, Paolo