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Tue, 23 Sep 2025 22:19:49 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEKWR4642Yw5maqKFG82ykSWIdzBhL17R+UP3C4cLfdONnTKmSW6HpeHdooGU/0F96sm7uhPA== X-Received: by 2002:a05:6a21:3290:b0:24a:d857:fcab with SMTP id adf61e73a8af0-2cfdaf0bcdemr6339872637.23.1758691188899; Tue, 23 Sep 2025 22:19:48 -0700 (PDT) Received: from [10.218.33.29] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-77cfec3dadbsm17384435b3a.68.2025.09.23.22.19.45 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 23 Sep 2025 22:19:48 -0700 (PDT) Message-ID: Date: Wed, 24 Sep 2025 10:49:32 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] clk: qcom: gcc-sm8750: Add a new frequency for sdcc2 clock To: Taniya Das , Bjorn Andersson , Michael Turquette , Stephen Boyd , Melody Olvera , Dmitry Baryshkov , Taniya Das Cc: Ajit Pandey , Imran Shaik , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250924-sm8750_gcc_sdcc2_frequency-v1-1-541fd321125f@oss.qualcomm.com> Content-Language: en-US From: Imran Shaik In-Reply-To: <20250924-sm8750_gcc_sdcc2_frequency-v1-1-541fd321125f@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: mdyBy-KrVDgoKJ89eJV4XUnfQqM0b0wI X-Authority-Analysis: v=2.4 cv=YMOfyQGx c=1 sm=1 tr=0 ts=68d37f77 cx=c_pps a=WW5sKcV1LcKqjgzy2JUPuA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=yJojWOMRYYMA:10 a=EUspDBNiAAAA:8 a=aG0I0WmwaBOL6KmX638A:9 a=QEXdDO2ut3YA:10 a=OpyuDcXvxspvyRM73sMx:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwOTIwMDAwNCBTYWx0ZWRfX+mvTYHYM1JE1 4zOQkPKDEu7678Lm1cVvQmKmsxvwSZduo/+vxzeij8sk9OfE5PukoHoAz5Vxw28pkdvYUNydJ1y CcRORoshed0S9ln2ZL0PqOP4xSac5YnzTNC36906Lkb8XoKM7O+OmhTLruObqBowj6ldyDb621+ 8Bo2P7em4RWIStTopC1pRTmpa804pq2/bKPGThhRGqRnvbZJRj5k0EaBOb4OrhRrrpj4oX9Lbvr IYu5i5lCh9mGel9fJdBSLWu6xumk7WduYIIQPTG5jYA8ZdUxQybKFu4SEFICHkx0ck8qhiYgmSs O+PSQuyypfJW/f5nC9d2lKsNhiU+eRoLzGEhyuwSZ9WP8qOFfyKtCrQxlW7NvAxNp8OzF+1UzGb AJ3mWZd7 X-Proofpoint-ORIG-GUID: mdyBy-KrVDgoKJ89eJV4XUnfQqM0b0wI X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-23_08,2025-09-22_05,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 bulkscore=0 adultscore=0 priorityscore=1501 spamscore=0 clxscore=1015 suspectscore=0 phishscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2509200004 On 9/24/2025 12:08 AM, Taniya Das wrote: > The SD card support requires a 37.5MHz clock; add it to the frequency > list for the storage SW driver to be able to request for the frequency. > > Fixes: 3267c774f3ff ("clk: qcom: Add support for GCC on SM8750") > Signed-off-by: Taniya Das > --- > drivers/clk/qcom/gcc-sm8750.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/clk/qcom/gcc-sm8750.c b/drivers/clk/qcom/gcc-sm8750.c > index 8092dd6b37b56f4fd786e33d4f0e8aabcd6ecdfe..def86b71a3da534f07844f01ecb73b424db3bddc 100644 > --- a/drivers/clk/qcom/gcc-sm8750.c > +++ b/drivers/clk/qcom/gcc-sm8750.c > @@ -1012,6 +1012,7 @@ static struct clk_rcg2 gcc_qupv3_wrap2_s7_clk_src = { > static const struct freq_tbl ftbl_gcc_sdcc2_apps_clk_src[] = { > F(400000, P_BI_TCXO, 12, 1, 4), > F(25000000, P_GCC_GPLL0_OUT_EVEN, 12, 0, 0), > + F(37500000, P_GCC_GPLL0_OUT_EVEN, 8, 0, 0), > F(50000000, P_GCC_GPLL0_OUT_EVEN, 6, 0, 0), > F(100000000, P_GCC_GPLL0_OUT_EVEN, 3, 0, 0), > F(202000000, P_GCC_GPLL9_OUT_MAIN, 4, 0, 0), > > --- > base-commit: ce7f1a983b074f6cf8609068088ca3182c569ee4 > change-id: 20250923-sm8750_gcc_sdcc2_frequency-debfdbbab8b3 > > Best regards, Reviewed-by: Imran Shaik Thanks, Imran