From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.1 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_PASS, URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A1A43C282D7 for ; Mon, 11 Feb 2019 10:24:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7166C2080D for ; Mon, 11 Feb 2019 10:24:58 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=synopsys.com header.i=@synopsys.com header.b="CvNxYSoM" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727057AbfBKKY5 (ORCPT ); Mon, 11 Feb 2019 05:24:57 -0500 Received: from us01smtprelay-2.synopsys.com ([198.182.47.9]:48250 "EHLO smtprelay.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726041AbfBKKY4 (ORCPT ); Mon, 11 Feb 2019 05:24:56 -0500 Received: from mailhost.synopsys.com (badc-mailhost1.synopsys.com [10.192.0.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtprelay.synopsys.com (Postfix) with ESMTPS id C574A24E171A; Mon, 11 Feb 2019 02:24:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1549880696; bh=+wS3QB9Q/Ttq9cP5dShY0goPrBx5IxvPPI+Gt5VMXm0=; h=Subject:To:CC:References:From:Date:In-Reply-To:From; b=CvNxYSoMTQmce6mtvx7U74GEFny5Lkfi8p24U5Q8H2NvV7cMrr4bjhQy4TvVmKiW+ 9NHN2XHoWECkec2toTArz5TydQRauMtqXmMHMwUJc7EpYiy1vrNIkIlmACyVrqEmc2 pv55Y00zqpoH2gNnYMlyMikU1WOK1100010cJFfG9GytRtWtk00ypWGL6ePoUN/rPP dWrIiB/NLUlzqx4NKU9IU89kK84yq/Q7hRUgYZLuRGUKs1jir8b35iejreKM4rB+DY T+vwaLLdZZKa9wuSbFCqxK1LtYvGtb9t7JC8hjKd93Rn1q0NJtiLnaNxItMQN4X5yZ u04ekyCsAXfMw== Received: from US01WEHTC3.internal.synopsys.com (us01wehtc3.internal.synopsys.com [10.15.84.232]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by mailhost.synopsys.com (Postfix) with ESMTPS id 02C3FA0071; Mon, 11 Feb 2019 10:24:49 +0000 (UTC) Received: from DE02WEHTCB.internal.synopsys.com (10.225.19.94) by US01WEHTC3.internal.synopsys.com (10.15.84.232) with Microsoft SMTP Server (TLS) id 14.3.408.0; Mon, 11 Feb 2019 02:24:49 -0800 Received: from DE02WEHTCA.internal.synopsys.com (10.225.19.92) by DE02WEHTCB.internal.synopsys.com (10.225.19.94) with Microsoft SMTP Server (TLS) id 14.3.408.0; Mon, 11 Feb 2019 11:24:47 +0100 Received: from [10.107.25.131] (10.107.25.131) by DE02WEHTCA.internal.synopsys.com (10.225.19.80) with Microsoft SMTP Server (TLS) id 14.3.408.0; Mon, 11 Feb 2019 11:24:47 +0100 Subject: Re: [PATCH v2 00/15] PCI: endpoint: Cleanup EPC features To: Kishon Vijay Abraham I , Lorenzo Pieralisi , Gustavo Pimentel , Alan Douglas , "Shawn Lin" , Heiko Stuebner CC: Bjorn Helgaas , Jingoo Han , "linux-omap@vger.kernel.org" , "linux-pci@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-rockchip@lists.infradead.org" , "linux-arm-kernel@lists.infradead.org" References: <20190114111513.21618-1-kishon@ti.com> From: Gustavo Pimentel Message-ID: Date: Mon, 11 Feb 2019 10:19:47 +0000 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.5.0 MIME-Version: 1.0 In-Reply-To: <20190114111513.21618-1-kishon@ti.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.107.25.131] Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On 14/01/2019 11:14, Kishon Vijay Abraham I wrote: > Hi Lorenzo, > > The Endpoint controller driver uses features member in 'struct pci_epc' > to advertise the list of supported features to the endpoint function > driver. > > There are a few shortcomings with this approach. > *) Certain endpoint controllers support fixed size BAR (e.g. TI's > AM654 uses Designware configuration with fixed size BAR). The > size of each BARs cannot be passed to the endpoint function > driver. > *) Too many macros for handling EPC features. > (EPC_FEATURE_NO_LINKUP_NOTIFIER, EPC_FEATURE_BAR_MASK, > EPC_FEATURE_MSIX_AVAILABLE, EPC_FEATURE_SET_BAR, > EPC_FEATURE_GET_BAR) > *) Endpoint controllers are directly modifying struct pci_epc > members. (I have plans to move struct pci_epc to > drivers/pci/endpoint so that pci_epc members are referenced > only by endpoint core). > > To overcome the above shortcomings, introduced pci_epc_get_features() > API, pci_epc_features structure and a ->get_features() callback. > > Also added a patch to set BAR flags in pci_epf_alloc_space and > remove it from pci-epf-test function driver. > > Changes from v1: > *) Fixed helper function to return '0' (or BAR_0) for any incorrect > values in reserved BAR. > *) Do not set_bar or alloc space for BARs if the BARs are reserved > *) Fix incorrect check of epc_features in pci_epf_test_bind > > Tested on TI's DRA7xx platform and AM654 platform. Support for PCIe > in AM654 platform will be posted shortly. > > Kishon Vijay Abraham I (15): > PCI: endpoint: Add new pci_epc_ops to get EPC features > PCI: dwc: Add ->get_features() callback function in dw_pcie_ep_ops > PCI: designware-plat: Populate ->get_features() dw_pcie_ep_ops > PCI: pci-dra7xx: Populate ->get_features() dw_pcie_ep_ops > PCI: rockchip: Populate ->get_features() dw_pcie_ep_ops > PCI: cadence: Populate ->get_features() cdns_pcie_epc_ops > PCI: endpoint: Add helper to get first unreserved BAR > PCI: endpoint: Fix pci_epf_alloc_space to set correct MEM TYPE flags > PCI: pci-epf-test: Remove setting epf_bar flags in function driver > PCI: pci-epf-test: Do not allocate next BARs memory if current BAR is > 64Bit > PCI: pci-epf-test: Use pci_epc_get_features to get EPC features > PCI: cadence: Remove pci_epf_linkup from Cadence EP driver > PCI: rockchip: Remove pci_epf_linkup from Rockchip EP driver > PCI: designware-plat: Remove setting epc->features in Designware plat > EP driver > PCI: endpoint: Remove features member in struct pci_epc > > drivers/pci/controller/dwc/pci-dra7xx.c | 13 +++ > .../pci/controller/dwc/pcie-designware-ep.c | 12 +++ > .../pci/controller/dwc/pcie-designware-plat.c | 17 +++- > drivers/pci/controller/dwc/pcie-designware.h | 1 + > drivers/pci/controller/pcie-cadence-ep.c | 25 ++--- > drivers/pci/controller/pcie-rockchip-ep.c | 16 +++- > drivers/pci/endpoint/functions/pci-epf-test.c | 93 ++++++++++++------- > drivers/pci/endpoint/pci-epc-core.c | 53 +++++++++++ > drivers/pci/endpoint/pci-epf-core.c | 4 +- > include/linux/pci-epc.h | 31 +++++-- > 10 files changed, 201 insertions(+), 64 deletions(-) > Sorry for the delay, I had a problem with my setup. Tested-by: Gustavo Pimentel