From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D52ECC433EF for ; Tue, 22 Mar 2022 00:45:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234372AbiCVAql (ORCPT ); Mon, 21 Mar 2022 20:46:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45976 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234341AbiCVAqh (ORCPT ); Mon, 21 Mar 2022 20:46:37 -0400 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B4CB6DE8 for ; Mon, 21 Mar 2022 17:45:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1647909911; x=1679445911; h=message-id:date:mime-version:cc:subject:to:references: from:in-reply-to:content-transfer-encoding; bh=TSpDJqCgCqJQmfCcYan0G8S5Qg4VBq1hKKqgc00HwE4=; b=XFRLL3Z2p1krXhIPAwn+UCAPUCCEo7hUjZAgQpWO9XEZFSbJe7dKo31U I+oF4Xttns5meiBVYOZvH4w+z/tqc0q0HTQMs5b9qXXPRPcR3/nOWc0rv SZXVVaiNYa35sDJIFumbSAGkL+pIQ8Fk11qeY0Y35KrY346DP3NQFbG2N tNoSvTXLnJstqWVL7CdWwRws6KWA95XRiltklCnAU+xv+MSwopxxYRfl6 45jflQHcLje4CJjtTShrc0+eMbZgaVp4P1ws86/B2TY6FcfM86wFYTZDS /N0PA1USQ5A4x1TIVHTBsDdazwo1f76bO3Pldu867cBbadCkJ+FKcwCic w==; X-IronPort-AV: E=McAfee;i="6200,9189,10293"; a="257876818" X-IronPort-AV: E=Sophos;i="5.90,200,1643702400"; d="scan'208";a="257876818" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Mar 2022 17:45:11 -0700 X-IronPort-AV: E=Sophos;i="5.90,200,1643702400"; d="scan'208";a="560118888" Received: from blu2-mobl3.ccr.corp.intel.com (HELO [10.254.208.85]) ([10.254.208.85]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Mar 2022 17:45:07 -0700 Message-ID: Date: Tue, 22 Mar 2022 08:45:05 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.7.0 Cc: baolu.lu@linux.intel.com, Joerg Roedel , Jason Gunthorpe , Christoph Hellwig , Kevin Tian , Ashok Raj , Will Deacon , Robin Murphy , Jean-Philippe Brucker , Eric Auger , Liu Yi L , Jacob jun Pan , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH RFC 01/11] iommu: Add pasid_bits field in struct dev_iommu Content-Language: en-US To: Jean-Philippe Brucker References: <20220320064030.2936936-1-baolu.lu@linux.intel.com> <20220320064030.2936936-2-baolu.lu@linux.intel.com> From: Lu Baolu In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2022/3/21 19:22, Jean-Philippe Brucker wrote: > Hi Baolu, > > On Sun, Mar 20, 2022 at 02:40:20PM +0800, Lu Baolu wrote: >> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c >> index 627a3ed5ee8f..8e262210b5ad 100644 >> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c >> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c >> @@ -2812,6 +2812,7 @@ static int arm_smmu_dev_enable_feature(struct device *dev, >> master->iopf_enabled = true; >> return 0; >> case IOMMU_DEV_FEAT_SVA: >> + dev->iommu->pasid_bits = master->ssid_bits; > This would be better in arm_smmu_probe_device() Sure. Best regards, baolu