From: Shawn Lin <shawn.lin@rock-chips.com>
To: palash.kambar@oss.qualcomm.com
Cc: shawn.lin@rock-chips.com, linux-arm-msm@vger.kernel.org,
linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org,
nitin.rawat@oss.qualcomm.com, mani@kernel.org,
James.Bottomley@HansenPartnership.com,
martin.petersen@oracle.com
Subject: Re: [PATCH v1 1/2] ufs: core: Configure only active lanes during link
Date: Wed, 11 Mar 2026 14:53:36 +0800 [thread overview]
Message-ID: <a1822226-0881-b692-9663-c0832c9212fd@rock-chips.com> (raw)
In-Reply-To: <20260311060912.3139257-2-palash.kambar@oss.qualcomm.com>
Hi Palash
在 2026/03/11 星期三 14:09, palash.kambar@oss.qualcomm.com 写道:
> From: Palash Kambar <palash.kambar@oss.qualcomm.com>
>
> The number of active lanes detected during UFS link startup can be
connected lanes(which is used in the code blow) or active lanes? There
are different primitives in UniPro context.
> fewer than the lanes specified in the device tree. The current driver
> logic attempts to configure all lanes defined in the device tree,
> regardless of their actual availability. This mismatch may cause
> failures during power mode changes.
>
It sounds vague, how it causes failures, could you quote some clue from
spec?
> Hence, add check to identify only the lanes that were successfully
> discovered during link startup, to warn on power mode change errors
> caused by mismatched lane counts.
>
> Signed-off-by: Palash Kambar <palash.kambar@oss.qualcomm.com>
> ---
> drivers/ufs/core/ufshcd.c | 39 +++++++++++++++++++++++++++++++++++++++
> 1 file changed, 39 insertions(+)
>
> diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c
> index 31950fc51a4c..c956fab32932 100644
> --- a/drivers/ufs/core/ufshcd.c
> +++ b/drivers/ufs/core/ufshcd.c
> @@ -5035,6 +5035,42 @@ void ufshcd_update_evt_hist(struct ufs_hba *hba, u32 id, u32 val)
> }
> EXPORT_SYMBOL_GPL(ufshcd_update_evt_hist);
>
> +static int ufshcd_get_connected_tx_lanes(struct ufs_hba *hba, u32 *tx_lanes)
> +{
> + return ufshcd_dme_get(hba,
> + UIC_ARG_MIB(PA_CONNECTEDTXDATALANES), tx_lanes);
> +}
> +
> +static int ufshcd_get_connected_rx_lanes(struct ufs_hba *hba, u32 *rx_lanes)
> +{
> + return ufshcd_dme_get(hba,
> + UIC_ARG_MIB(PA_CONNECTEDRXDATALANES), rx_lanes);
> +}
> +
> +static void ufshcd_validate_link_params(struct ufs_hba *hba)
> +{
> + int val = 0;
> +
> + if (ufshcd_get_connected_tx_lanes(hba, &val))
> + return;
> +
> + if (val != hba->lanes_per_direction) {
> + dev_err(hba->dev, "Tx lane mismatch [config,reported] [%d,%d]\n",
> + hba->lanes_per_direction, val);
> + return;
> + }
> +
> + val = 0;
> +
> + if (ufshcd_get_connected_rx_lanes(hba, &val))
> + return;
> +
> + if (val != hba->lanes_per_direction) {
> + dev_err(hba->dev, "Rx lane mismatch [config,reported] [%d,%d]\n",
> + hba->lanes_per_direction, val);
> + }
> +}
> +
> /**
> * ufshcd_link_startup - Initialize unipro link startup
> * @hba: per adapter instance
> @@ -5108,6 +5144,9 @@ static int ufshcd_link_startup(struct ufs_hba *hba)
> goto out;
> }
>
> + /* Check successfully detected lanes */
> + ufshcd_validate_link_params(hba);
> +
> /* Include any host controller configuration via UIC commands */
> ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
> if (ret)
>
next prev parent reply other threads:[~2026-03-11 6:53 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-11 6:09 [PATCH v1 0/2] Add post change sequence for link start notify palash.kambar
2026-03-11 6:09 ` [PATCH v1 1/2] ufs: core: Configure only active lanes during link palash.kambar
2026-03-11 6:53 ` Shawn Lin [this message]
2026-03-23 13:14 ` Palash Kambar
2026-03-23 15:43 ` Bart Van Assche
2026-03-26 16:17 ` Palash Kambar
2026-03-11 6:09 ` [PATCH v1 2/2] ufs: ufs-qcom: Enable Auto Hibern8 clock request support palash.kambar
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