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From: Baochen Qiang <quic_bqiang@quicinc.com>
To: Johan Hovold <johan@kernel.org>
Cc: Johan Hovold <johan+linaro@kernel.org>,
	Jeff Johnson <jjohnson@kernel.org>,
	Stephan Gerhold <stephan.gerhold@linaro.org>,
	<ath12k@lists.infradead.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] wifi: ath12k: extend dma mask to 36 bits
Date: Mon, 24 Mar 2025 16:05:33 +0800	[thread overview]
Message-ID: <a1aa02e8-7f58-46ae-b3df-ae43288cf683@quicinc.com> (raw)
In-Reply-To: <Z-EMgPg5Gp-JtTZp@hovoldconsulting.com>



On 3/24/2025 3:40 PM, Johan Hovold wrote:
> On Mon, Mar 24, 2025 at 11:06:16AM +0800, Baochen Qiang wrote:
>> On 3/22/2025 12:23 AM, Johan Hovold wrote:
>>> Extend the DMA mask to 36 bits to avoid using bounce buffers on machines
>>> without an iommu (under OS control) similar to what was done for ath11k
>>> in commit dbd73acb22d8 ("wifi: ath11k: enable 36 bit mask for stream
>>> DMA").
>>>
>>> This specifically avoids using bounce buffers on Qualcomm Snapdragon X
>>> Elite machines like the Lenovo ThinkPad T14s when running at EL1.
>>
>> why bounce buffer is used at EL1? is it because IOMMU is not working at EL1?
>> or even because IOMMU is not present on Elite machines?
> 
> As I mentioned above, the IOMMU is not under OS control. The boot
> firmware / hypervisor has configured the IOMMU in by-pass mode and it's
> effectively missing from the OS POV.
> 
> Note that this is also the case on Qualcomm platforms like sc8280xp
> (e.g. the Lenovo ThinkPad X13s which already benefits from the extended
> DMA mask for ath11k).
> 
>>> Note that the mask could possibly be extended further but unresolved DMA
>>> issues with 64 GiB X Elite machines currently prevents that from being
>>> tested.
>>
>> could you help elaborate how it could be extended?
> 
> The mask should reflect the capability of the device. That may be
> 64 (or 40) bits, but I've only been able to test using 36 bits.

are you talking about QCN9274? As far as I know, WCN7850 does not support 40 bits or more.

> 
>>> Also note that the driver is limited to 32 bits for coherent
>>> allocations and that there is no need to check for errors when setting
>>> masks larger than 32 bits.
>>
>> why is it not necessary to check error?
> 
> The DMA-API documentation was recently updated to clarify that there is
> no need to check for errors when settings DMA mask with 32 bits or more
> as the call will never fail in that case. See commit
> 
> 	f7ae20f2fc4e ("docs: dma: correct dma_set_mask() sample code")

thanks for the info.

> 
> Johan


  reply	other threads:[~2025-03-24  8:05 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-21 16:23 Johan Hovold
2025-03-24  3:06 ` Baochen Qiang
2025-03-24  7:40   ` Johan Hovold
2025-03-24  8:05     ` Baochen Qiang [this message]
2025-03-24  8:20       ` Johan Hovold
2025-03-24  8:29         ` Baochen Qiang
2025-03-24  8:33 ` Baochen Qiang
2025-03-24  9:18   ` Johan Hovold
     [not found] ` <b1e44988-a80c-4e60-a093-434e0834aa1a@quicinc.com>
2025-03-26  4:29   ` Vasanthakumar Thiagarajan
2025-03-26 15:11 ` Jeff Johnson
2025-03-26 15:16   ` Johan Hovold
2025-03-26 15:41     ` Jeff Johnson
2025-03-27 22:58 ` Jeff Johnson

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