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Mon, 17 Mar 2025 09:22:48 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 52H9Mldr020485 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 17 Mar 2025 09:22:47 GMT Received: from [10.152.195.140] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 17 Mar 2025 02:22:43 -0700 Message-ID: Date: Mon, 17 Mar 2025 14:52:40 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1] arm64: dts: qcom: ipq5424: fix and relocate uart1 gpio configurations To: Kathiravan Thirumoorthy , , , , , , , , , CC: References: <20250312091418.3265352-1-quic_mmanikan@quicinc.com> <8efdc560-d061-4f03-bed5-8571044119cc@oss.qualcomm.com> Content-Language: en-US From: Manikanta Mylavarapu In-Reply-To: <8efdc560-d061-4f03-bed5-8571044119cc@oss.qualcomm.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Authority-Analysis: v=2.4 cv=LuaSymdc c=1 sm=1 tr=0 ts=67d7e9e8 cx=c_pps a=ouPCqIW2jiPt+lZRy3xVPw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=Vs1iUdzkB0EA:10 a=COk6AnOGAAAA:8 a=5MmNdGAJjUIhlSV6Oz8A:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=tNJfs_13QIiYcIrPbywa:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: Dg2oimBU9dGSoakBt7E_wkNcSyVfrxX8 X-Proofpoint-ORIG-GUID: Dg2oimBU9dGSoakBt7E_wkNcSyVfrxX8 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1093,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-03-17_03,2025-03-17_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 bulkscore=0 mlxscore=0 suspectscore=0 priorityscore=1501 phishscore=0 adultscore=0 clxscore=1015 lowpriorityscore=0 spamscore=0 mlxlogscore=770 malwarescore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2503170068 On 3/12/2025 10:10 PM, Kathiravan Thirumoorthy wrote: > On 3/12/2025 2:44 PM, Manikanta Mylavarapu wrote: >> Update the bias configuration for UART1 TX and RX pins to ensure correct >> settings for RDP466. >> >> Additionally, move the UART1 GPIO configurations from the common .dtsi >> file to the RDP-specific .dts files to account for differing bias >> configurations across RDPs of IPQ5424. >> >> Fixes: 1a91d2a6021e ("arm64: dts: qcom: add IPQ5424 SoC and rdp466 board support") >> Signed-off-by: Manikanta Mylavarapu >> --- >>   arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 16 +++++++++++++++- >>   arch/arm64/boot/dts/qcom/ipq5424.dtsi       |  7 ------- >>   2 files changed, 15 insertions(+), 8 deletions(-) >> >> diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >> index b6e4bb3328b3..7b85aaa11ee8 100644 >> --- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >> +++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >> @@ -147,10 +147,24 @@ data-pins { >>               bias-pull-up; >>           }; >>       }; >> + >> +    uart1_tx_state: uart1-tx-state { >> +        pins = "gpio44"; >> +        function = "uart1"; >> +        drive-strength = <8>; >> +        bias-pull-down; >> +    }; >> + >> +    uart1_rx_state: uart1-rx-state { >> +        pins = "gpio43"; >> +        function = "uart1"; >> +        drive-strength = <8>; >> +        bias-pull-up; >> +    }; >>   }; >>     &uart1 { >> -    pinctrl-0 = <&uart1_pins>; >> +    pinctrl-0 = <&uart1_tx_state>, <&uart1_rx_state>; > > > Change LGTM. But can we define both TX and RX pin definition under one node like below, to align with the SPI and SDCC gpio definition layout? > > qup_uart1_default_state: qup-uart1-default-state { > >         uart1_tx_state: uart1-tx-state { > >          ... > >         }; > >         uart1_rx_state: uart1-rx-state { > >          ... > >         }; > > }; > > and refer it like pinctrl-0 = <&qup_uart1_default_state>; > > Hi Kathir, Thank you for reviewing the patch. I will incorporate the suggested change in the next version. Thanks & Regards, Manikanta.