From: Cong Liu <liucong2@kylinos.cn>
To: "Christian König" <christian.koenig@amd.com>,
airlied@linux.ie, airlied@redhat.com, kraxel@redhat.com,
robin.murphy@arm.com
Cc: virtualization@lists.linux-foundation.org, daniel@ffwll.ch,
dri-devel@lists.freedesktop.org, ray.huang@amd.com,
spice-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] drm/qxl: fix qxl can't use in arm64
Date: Wed, 30 Mar 2022 14:46:02 +0800 [thread overview]
Message-ID: <a1ceefb7-32d8-9ce3-e56f-7684e6d3ee58@kylinos.cn> (raw)
In-Reply-To: <982d233d-7e30-f44e-f49d-473c3c41721e@amd.com>
any suggestions or extra test I can do now?
Regards,
Cong
On 2022/3/25 15:45, Christian König wrote:
> Am 24.03.22 um 11:49 schrieb Cong Liu:
>> qxl use ioremap to map ram_header and rom, in the arm64 implementation,
>> the device is mapped as DEVICE_nGnRE, it can not support unaligned
>> access. and qxl is a virtual device, it can be treated more like RAM
>> than actual MMIO registers. use ioremap_wc() replace it.
>>
>> Signed-off-by: Cong Liu <liucong2@kylinos.cn>
>
> Looks sane to me, but I'm really not involved enough to fully judge.
>
> Acked-by: Christian König <christian.koenig@amd.com>
>
>> ---
>> drivers/gpu/drm/qxl/qxl_kms.c | 4 ++--
>> drivers/gpu/drm/qxl/qxl_ttm.c | 4 ++--
>> 2 files changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/qxl/qxl_kms.c
>> b/drivers/gpu/drm/qxl/qxl_kms.c
>> index 4dc5ad13f12c..a054e4a00fe8 100644
>> --- a/drivers/gpu/drm/qxl/qxl_kms.c
>> +++ b/drivers/gpu/drm/qxl/qxl_kms.c
>> @@ -165,7 +165,7 @@ int qxl_device_init(struct qxl_device *qdev,
>> (int)qdev->surfaceram_size / 1024,
>> (sb == 4) ? "64bit" : "32bit");
>> - qdev->rom = ioremap(qdev->rom_base, qdev->rom_size);
>> + qdev->rom = ioremap_wc(qdev->rom_base, qdev->rom_size);
>> if (!qdev->rom) {
>> pr_err("Unable to ioremap ROM\n");
>> r = -ENOMEM;
>> @@ -183,7 +183,7 @@ int qxl_device_init(struct qxl_device *qdev,
>> goto rom_unmap;
>> }
>> - qdev->ram_header = ioremap(qdev->vram_base +
>> + qdev->ram_header = ioremap_wc(qdev->vram_base +
>> qdev->rom->ram_header_offset,
>> sizeof(*qdev->ram_header));
>> if (!qdev->ram_header) {
>> diff --git a/drivers/gpu/drm/qxl/qxl_ttm.c
>> b/drivers/gpu/drm/qxl/qxl_ttm.c
>> index b2e33d5ba5d0..95df5750f47f 100644
>> --- a/drivers/gpu/drm/qxl/qxl_ttm.c
>> +++ b/drivers/gpu/drm/qxl/qxl_ttm.c
>> @@ -82,13 +82,13 @@ int qxl_ttm_io_mem_reserve(struct ttm_device *bdev,
>> case TTM_PL_VRAM:
>> mem->bus.is_iomem = true;
>> mem->bus.offset = (mem->start << PAGE_SHIFT) + qdev->vram_base;
>> - mem->bus.caching = ttm_cached;
>> + mem->bus.caching = ttm_write_combined;
>> break;
>> case TTM_PL_PRIV:
>> mem->bus.is_iomem = true;
>> mem->bus.offset = (mem->start << PAGE_SHIFT) +
>> qdev->surfaceram_base;
>> - mem->bus.caching = ttm_cached;
>> + mem->bus.caching = ttm_write_combined;
>> break;
>> default:
>> return -EINVAL;
>
next prev parent reply other threads:[~2022-03-30 10:20 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <12eba824-ee80-0aac-56ed-e13084c9cae7@amd.com>
2022-03-24 10:49 ` Cong Liu
2022-03-25 7:45 ` Christian König
2022-03-30 6:46 ` Cong Liu [this message]
2022-03-30 10:43 ` David Airlie
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