From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26D32C10F14 for ; Tue, 8 Oct 2019 12:53:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id F337720815 for ; Tue, 8 Oct 2019 12:53:58 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.b="xoe0O4j3" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731127AbfJHMx6 (ORCPT ); Tue, 8 Oct 2019 08:53:58 -0400 Received: from mail-wr1-f66.google.com ([209.85.221.66]:40369 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730683AbfJHMx5 (ORCPT ); Tue, 8 Oct 2019 08:53:57 -0400 Received: by mail-wr1-f66.google.com with SMTP id h4so10558069wrv.7 for ; Tue, 08 Oct 2019 05:53:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monstr-eu.20150623.gappssmtp.com; s=20150623; h=subject:to:cc:references:from:message-id:date:user-agent :mime-version:in-reply-to:content-language:content-transfer-encoding; bh=lG0BiHGKtQJYQPseYgImOuh5oBQYI7JsqZj/f9OA+vE=; b=xoe0O4j3lww/x6vqoirLYDGCX64FXGWzyddsGQpfvipXVuEaQ7TMr2CgAcaXLf1V6H +ydiGzyxPlIgtyC1Sr1Eh+G0zgk4hxy5U8BJJ3j0TcjD+JdgpayxF0BOcMeK/EpPqHJl o8mKJYsXh06uQRskf0yu3D06HKoz9DBnLROTTSs1TNH2+Vys1PuYj/mNgdc3f5oe3BN6 f9BJnj00RiqUmVYoEkEpg9958dhyQK4abl2Lm3YfE4N0bQR90zA4YgEnJL4lcOjyFU9M TV8y0Yv86KuFTLSorLdKAWbPgg+3lSDrM//kxGGuEd0EqQkUmVP8iguq23eLYZahGTvS CQtw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:cc:references:from:message-id:date :user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=lG0BiHGKtQJYQPseYgImOuh5oBQYI7JsqZj/f9OA+vE=; b=Obtt3X5JsJDgJFfovMOVVdPUJMwzdvSPyUcVxNJp5liOkh0yh3EOwClzX/+0KKZfFv 9WHuJ72wnvVXGaCXcTOm9KWtHkcenvi3pE726ztjl+dCTQ1XECTHyPva77jjUv65vq5v BSJMv0jyTpMJGe2NqUIzvyMAEVY29pGesyjL3Ou9C/AVtQv8/rNFyDzXFm6zLEvplIK9 4ez2LJBYckXF2gLRxZjCjUXe7GNVhLa4I02IJbxjj9IWFT6mYlFUMXkRYYSOBVs0RQNv 0a/ltwQ0Uzotd7R9aWvOCEULvi5k1c/LR3WZ2241aH8EAhHwHVlbqLG53P8vUE+eh/fH xFTA== X-Gm-Message-State: APjAAAWZquupchUS1nlQ8/5K7u574RAYJHHIQwU6TsK947CVZwX1YyT4 n7zb0PuA2N4YOImm+iIAsgHwzw== X-Google-Smtp-Source: APXvYqzo1BULuW1CrUYm6GTWgJq7cZTmwoSWhlDLfCFufnn7CgCC+k8buity1Fq9XHEMYMvQtOKm/Q== X-Received: by 2002:adf:e60d:: with SMTP id p13mr10866374wrm.298.1570539235767; Tue, 08 Oct 2019 05:53:55 -0700 (PDT) Received: from [64.233.167.109] ([149.199.62.131]) by smtp.gmail.com with ESMTPSA id o18sm5028415wrw.90.2019.10.08.05.53.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 08 Oct 2019 05:53:54 -0700 (PDT) Subject: Re: [PATCH] PCI/MSI: Enable PCI_MSI_IRQ_DOMAIN support for Microblaze To: Bjorn Helgaas , Michal Simek Cc: linux-kernel@vger.kernel.org, git@xilinx.com, Kuldeep Dave , linux-pci@vger.kernel.org References: <20191008124723.GA161444@google.com> From: Michal Simek Message-ID: Date: Tue, 8 Oct 2019 14:53:47 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: <20191008124723.GA161444@google.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 08. 10. 19 14:47, Bjorn Helgaas wrote: > On Tue, Oct 08, 2019 at 12:39:22PM +0200, Michal Simek wrote: >> From: Kuldeep Dave >> >> Add Microblaze as an arch that supports PCI_MSI_IRQ_DOMAIN. >> Enabling msi.h generation is done by separate patch. >> >> Similar change was done by commit 2a9af0273c1c >> ("PCI/MSI: Enable PCI_MSI_IRQ_DOMAIN support for RISC-V") >> >> Signed-off-by: Kuldeep Dave >> Signed-off-by: Bharat Kumar Gogada >> Signed-off-by: Michal Simek > > Acked-by: Bjorn Helgaas > >> Arch part was sent here: >> https://lkml.org/lkml/2019/10/8/277 > > Can you please squash this drivers/pci/Kconfig change into the same > patch as the arch/microblaze patch mentioned above? That way there's > no ordering issue between the two patches. I'd be glad to merge it, > or you can add my ack and apply it via the Microblaze tree. Just let > me know which you prefer so I know whether to do something with this. > > Sorry; I probably suggested the splitting in the first place for > RISC-V, but I think that was a mistake. I was splitting them based on RISC-V case to follow this pattern. Anyway I will send v2 and please pick it via your tree. Thanks, Michal -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs