From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 69DEA335D3; Sat, 13 Apr 2024 10:59:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713005944; cv=none; b=tU9zRkGbHAOP5Tw1Jbg+sGOocYtdGIxSftNGUCOwoL8C4HUhSgGhHFLyacM2xLXjlKDIS06jiijaBdlQIlPcf7eyDSlgtDTvS1Mv+S0p9i7T192y8l9agyDE30dmeiJRmuRvim8zSxyDu08COf/tcgrg/Wv3Lo5ihDz1ugFHwTE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713005944; c=relaxed/simple; bh=XyNBnr7ZFttTsLqdtEP1Op0rqj1KHbc1K3+1RVUo3JU=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=igcVWC5lSCA71HR8wC67rJgWYjYPHn2/bZoHue+pxBktO4IFXDe64ZCzFtVvPb2ypdSoN/AfB4hq7yLXBSlpMAEMoM6eO1igL/6qCAQhkMhXKdGzj4hGFAF3L/Wn3tVa+jApefH+6uRk2faTsyYGv+fQOPJT+76IGu411hQ+rnc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Nq9sqE87; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Nq9sqE87" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E6CAEC113CD; Sat, 13 Apr 2024 10:59:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1713005944; bh=XyNBnr7ZFttTsLqdtEP1Op0rqj1KHbc1K3+1RVUo3JU=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=Nq9sqE878GK3tzKgdOCKLRiXzTmcttHGdRZ2QAtOe7mGQ37jPnIskR6nPz0bhGY8I fhaRy1TEYLZln8KJJIAIvT1E4GbnVCOcC71ay6y3B2vY08Ho26f+1D68WtZJIXG0QB TJiWEeKFHAVZz7pDwAxe0t6R0j/gDCYTka6zOq2SMvdY82ae9eep9ElH7xNiJ4Lf6a LtevqiIoTmBA+5fw9jq8b5ugwLnkIZKZySnWu6KTiMCO/ERA0f2V0v2nmP+M+mv5fP n3TlMi1gS2jM+CPjORNR4XZeYshS+kVWkzciUGd98uEZcMXDhW871QCE4GTSd7W5IE lRIfC1/FLHdjg== Message-ID: Date: Sat, 13 Apr 2024 12:58:59 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 1/2] regulator: dt-bindings: pca9450: add PMIC_RST_B warm reset property To: Fabio Aiuto , Mark Brown , Liam Girdwood , Rob Herring , Conor Dooley Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Matteo Lisi , Mirko Ardinghi References: <20240412084428.400607-1-fabio.aiuto@engicam.com> <20240412084428.400607-2-fabio.aiuto@engicam.com> Content-Language: en-US From: Krzysztof Kozlowski Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 12/04/2024 10:44, Fabio Aiuto wrote: > The default configuration of the PMIC behavior makes the PMIC > power cycle most regulators on PMIC_RST_B assertion. This power > cycling causes the memory contents of OCRAM to be lost. > Some systems needs some memory that survives reset and > reboot, therefore add a property to mark the regulator as > performing warm resets on PMIC_RST_B assertion. > > Cc: Matteo Lisi > Cc: Mirko Ardinghi > Signed-off-by: Fabio Aiuto > --- Discussion continues in v3. Best regards, Krzysztof