From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.remote-ip=192.198.163.15 ARC-Seal: i=1; d=subspace.kernel.org; s=arc20261015; a=rsa-sha256; cv=none; t=1793732448; b=ygQ/Sp+7eTddYuY7lHXwMQ4Hl+3BXX3JKVnpYSmbHgSd8O3tnjQh9HegGheltJVk6BKn CJIsTlbsdXYzIWEySqydDIHyDx1naOgONwpOo4apVxL1qGfkkXZo27oOdBHtTCdEfKey3 vSpQKy7vOniO1NWJT9VHIJIklYyQINkBIUs79dAp3PsVmm5HFqrlnWkyGd9CgRpfOYyec pd+/ohI5kJrMrnEIlMt78gRx6CZlU5ef2F4+kOjk5mKOSwV6HwcF5IYRg+tll7/h9zyuc xuFfDjZNHbITys1X/gH66kxMKtOkDz6uQ74p9bmpcLxkMW7ig4HtSzQI/TCiFgUhEXA== ARC-Message-Signature: i=1; d=subspace.kernel.org; s=arc20261015; a=rsa-sha256; c=relaxed/relaxed; t=1793732448; h=DMARC-Filter:DKIM-Signature:X-CSE-ConnectionGUID:X-CSE-MsgGUID: X-IronPort-AV:X-IronPort-AV:Received:X-CSE-ConnectionGUID: X-CSE-MsgGUID:X-ExtLoop1:X-IronPort-AV:Received:Message-ID:Date: MIME-Version:User-Agent:Subject:To:Cc:References:Content-Language: From:In-Reply-To:Content-Type:Content-Transfer-Encoding; bh=v43KQxELq5KVjVHEsX2xWpBfKEZ8VSn5Gvbluy8mURs=; b=WgDb+58dpkqG0i9YEsXgBZ7DZiSffuNbGDkNv4KZpv/ZjUlELc0wOXq7Dle4X4hoje9l dWb3R5gxO4nFbBsxiYAQnh5hm2sUFCvCWMauc6pPi2NsvK1Tz3kiSZJoxve8vZgtw+TcC tb5TGEQxQFlGqdFTCTc7O+fg7xdWuIFU1xP+uB1UHFAlu5/wXonTleZ5Zur2Vcx+r8X1E 61f/i8gwsNyPHumxq/a0q1GyCpYZ4q1xEe92PLCcpx+OZFGmbY/omacJrBPvu51or5Gjc 7fwnER9HtIfCayPQgzqUskv8Jlh8FBXQ8DJMDaCKG09TCyInGK9nIRZ14HMgByUug7A== ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=SNZ498qP; arc=none smtp.remote-ip=192.198.163.15 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4CAF6606A324 for ; Tue, 3 Nov 2026 19:00:29 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.2 smtp.subspace.kernel.org 4CAF6606A324 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key, unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=SNZ498qP DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1793732429; x=1825268429; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=uSbnyMu7zPfUwkMOnzRSRXvBzH7ND59gm+U4f8AT6Ts=; b=SNZ498qPKKAl4TdBNAQTGzy0ckXXsZEEqDEsmPTEk6Z/Vj52Irq8xoEA 7mNe+idm+mDaxoXprEV3YF0hYCpFCek1oRa4ioi6XGPsi4XSg5SdLPHX3 WfkNlj14PmCTHZPXvUnK+4wIpMBQnnvXtQdjjUULJA6/OmLlrBCVheMXW NpO7by57k8QcSLFhYKZILJQJ1iCLEbr0aFZWBjS795qsxpHZE44sIT2On D6xToIs4wipzUBy+XdPpjp+bGd5+UXt2M45KWfkAchcCfzvDEN8HAXeOn o56LHkPq6Nc2rs5MMh5AFpTmohaMx1iaB4ekIrp9Rme6EiUcV1fFv7p0F Q==; X-CSE-ConnectionGUID: Ue2Ph3h6RtWpuvTUdWdP6Q== X-CSE-MsgGUID: oyk0eSVMScawrorFNWyjJw== X-IronPort-AV: E=McAfee;i="6800,10657,11955"; a="2470734" X-IronPort-AV: E=Sophos;i="6.27,193,1787036400"; d="scan'208";a="2470734" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Nov 2026 11:00:29 -0800 X-CSE-ConnectionGUID: eNFCkQY/TKWLhsM53RGj4g== X-CSE-MsgGUID: 4fDu614yR5imfrONkh4GMw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.27,193,1787036400"; d="scan'208";a="6837732" Received: from kniemiec-mobl1.ger.corp.intel.com (HELO [10.245.245.160]) ([10.245.245.160]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Nov 2026 11:00:25 -0800 Message-ID: Date: Tue, 3 Nov 2026 19:00:24 +0000 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 28/33] drm/xe: Use IOVA-based DMA mapping for eligible tt BOs To: Matthew Brost , intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: Carlos Santa , Ryan Neph , Christian Koenig , Huang Rui , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , linux-kernel@vger.kernel.org, =?UTF-8?Q?Thomas_Hellstr=C3=B6m?= References: <20260711025619.2540575-1-matthew.brost@intel.com> <20260711025619.2540575-29-matthew.brost@intel.com> Content-Language: en-GB From: Matthew Auld In-Reply-To: <20260711025619.2540575-29-matthew.brost@intel.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 11/07/2026 03:56, Matthew Brost wrote: > Add support for mapping a ttm_tt's pages using the IOVA-based DMA API > (dma_iova_try_alloc()/link()/sync()/unlink()/free()) as an alternative > to the scatter-gather list. An IOVA mapping is a single contiguous DMA > range, which is cheaper to walk and program than an sg list. > > Whether the IOVA API can be used depends on the IOMMU mode, so the > decision is made once per tt at xe_ttm_tt_create() time and recorded in > struct xe_ttm_tt::use_iova. To keep the scope limited, only device BOs > that are not GGTT-mapped are eligible: dma-buf imports manage their own > mapping and GGTT bindings are programmed directly from the sg list. > dma_iova_try_alloc() may still fail, in which case the tt transparently > falls back to the sg list, which remains the default. > > The IOVA reservation is allocated at tt creation and freed at tt > destroy. xe_tt_map_iova() links the tt pages (coalescing physically > contiguous runs) and syncs the IOTLB; xe_tt_unmap_iova() unlinks them > but keeps the reservation so the tt can be remapped without > re-allocating IOVA space. xe_tt_map()/xe_tt_unmap() dispatch between the > IOVA and sg backends, and xe_bo_dma_unmap_pinned() learns about the IOVA > case. > > Consumers that walked the sg list via xe_res_first_sg(xe_bo_sg()) now go > through the new xe_res_first_tt() helper, which initializes either an > IOVA cursor (xe_res_first_iova()) or an sg cursor depending on the tt's > mapping mode. > > Cc: Carlos Santa > Cc: Ryan Neph > Cc: Christian Koenig > Cc: Huang Rui > Cc: Matthew Auld > Cc: Maarten Lankhorst > Cc: Maxime Ripard > Cc: Thomas Zimmermann > Cc: David Airlie > Cc: Simona Vetter > Cc: dri-devel@lists.freedesktop.org > Cc: linux-kernel@vger.kernel.org > Cc: Thomas Hellström > Assisted-by: GitHub_Copilot:claude-opus-4.8 > Signed-off-by: Matthew Brost > static void xe_ttm_tt_destroy(struct ttm_device *ttm_dev, struct ttm_tt *tt) > { > + struct xe_ttm_tt *xe_tt = container_of(tt, struct xe_ttm_tt, ttm); > + > + /* > + * Release the IOVA reservation made in xe_ttm_tt_create(). The pages > + * must already have been unlinked by xe_tt_unmap(). > + */ > + if (xe_tt->use_iova) { > + struct xe_device *xe = ttm_to_xe_device(ttm_dev); > + > + xe_assert(xe, !xe_tt->iova_linked); > + dma_iova_free(xe->drm.dev, &xe_tt->iova); Do we know if this is allowed? I think there is xe_bo_pci_dev_remove_all() which requires that evict_all will correctly tear down iommu mappings on stuff like pci unplug and I don't think tt_destroy is called in that flow? Does having the iova here cause issues? Also, for VRAM flow I think there is a tt_create() via pipeline gutting which will now create a new iova? Aside from that, maybe we can land 27/28 as standalone?